diff --git a/drivers/0x01_uart_asm_arm/.gitignore b/drivers/0x01_uart_asm_arm/.gitignore deleted file mode 100644 index 168d039..0000000 --- a/drivers/0x01_uart_asm_arm/.gitignore +++ /dev/null @@ -1,11 +0,0 @@ -# Object files -*.o - -# Executable and Linkable Format files -*.elf - -# Binary files -*.bin - -# UF2 files -*.uf2 diff --git a/drivers/0x01_uart_asm_arm/build.bat b/drivers/0x01_uart_asm_arm/build.bat deleted file mode 100644 index 5b4a93e..0000000 --- a/drivers/0x01_uart_asm_arm/build.bat +++ /dev/null @@ -1,90 +0,0 @@ -@echo off -REM ============================================================================== -REM FILE: build.bat -REM -REM DESCRIPTION: -REM Build script for RP2350. -REM -REM BRIEF: -REM Automates the process of assembling, linking, and generating UF2 firmware. -REM -REM AUTHOR: Kevin Thomas -REM CREATION DATE: October 5, 2025 -REM UPDATE DATE: October 5, 2025 -REM ============================================================================== - -echo Building... - -REM ============================================================================== -REM Assemble Source Files -REM ============================================================================== -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb vector_table.s -o vector_table.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb reset_handler.s -o reset_handler.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb stack.s -o stack.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb xosc.s -o xosc.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb reset.s -o reset.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb coprocessor.s -o coprocessor.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb uart.s -o uart_module.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb gpio.s -o gpio.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb delay.s -o delay.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb main.s -o main.o -if errorlevel 1 goto error -arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb image_def.s -o image_def.o -if errorlevel 1 goto error - -REM ============================================================================== -REM Link Object Files -REM ============================================================================== -arm-none-eabi-ld -g -T linker.ld vector_table.o reset_handler.o stack.o xosc.o reset.o coprocessor.o uart_module.o gpio.o delay.o main.o image_def.o -o uart.elf -if errorlevel 1 goto error - -REM ============================================================================== -REM Create Raw Binary from ELF -REM ============================================================================== -arm-none-eabi-objcopy -O binary uart.elf uart.bin -if errorlevel 1 goto error - -REM ============================================================================== -REM Create UF2 Image for RP2350 -REM -b 0x10000000 : base address -REM -f 0xe48bff59 : RP2350 family ID -REM ============================================================================== -python uf2conv.py -b 0x10000000 -f 0xe48bff59 -o uart.uf2 uart.bin -if errorlevel 1 goto error - -REM ============================================================================== -REM Success Message and Flashing Instructions -REM ============================================================================== -echo. -echo ================================= -echo SUCCESS! Created uart.uf2 -echo ================================= -echo. -echo To flash via UF2: -echo 1. Hold BOOTSEL button -echo 2. Plug in USB -echo 3. Copy uart.uf2 to RP2350 drive -echo. -echo To flash via OpenOCD (debug probe): -echo openocd -f interface/cmsis-dap.cfg -f target/rp2350.cfg -c "adapter speed 5000" -c "program uart.elf verify reset exit" -echo. -goto end - -REM ============================================================================== -REM Error Handling -REM ============================================================================== -:error -echo. -echo BUILD FAILED! -echo. - -:end diff --git a/drivers/0x01_uart_asm_arm/clean.bat b/drivers/0x01_uart_asm_arm/clean.bat deleted file mode 100644 index 170f783..0000000 --- a/drivers/0x01_uart_asm_arm/clean.bat +++ /dev/null @@ -1,59 +0,0 @@ -@echo off -REM ============================================================================== -REM FILE: clean.bat -REM -REM DESCRIPTION: -REM Clean script for RP2350. -REM -REM BRIEF: -REM Removes all build artifacts including object files, ELF, binary, and UF2. -REM -REM AUTHOR: Kevin Thomas -REM CREATION DATE: November 27, 2025 -REM UPDATE DATE: November 27, 2025 -REM ============================================================================== - -echo Cleaning build artifacts... - -REM ============================================================================== -REM Delete Object Files -REM ============================================================================== -if exist *.o ( - del /Q *.o - echo Deleted object files -) else ( - echo No object files found -) - -REM ============================================================================== -REM Delete ELF Files -REM ============================================================================== -if exist *.elf ( - del /Q *.elf - echo Deleted ELF files -) else ( - echo No ELF files found -) - -REM ============================================================================== -REM Delete Binary Files -REM ============================================================================== -if exist *.bin ( - del /Q *.bin - echo Deleted binary files -) else ( - echo No binary files found -) - -REM ============================================================================== -REM Delete UF2 Files -REM ============================================================================== -if exist *.uf2 ( - del /Q *.uf2 - echo Deleted UF2 files -) else ( - echo No UF2 files found -) - -echo. -echo Clean complete! diff --git a/drivers/0x01_uart_asm_arm/constants.s b/drivers/0x01_uart_asm_arm/constants.s deleted file mode 100644 index 58a428c..0000000 --- a/drivers/0x01_uart_asm_arm/constants.s +++ /dev/null @@ -1,41 +0,0 @@ -/** - * FILE: constants.s - * - * DESCRIPTION: - * RP2350 Memory Addresses and Constants. - * - * BRIEF: - * Defines all memory-mapped register addresses and constants used - * throughout the RP2350 driver. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -/** - * Memory addresses and constants. - */ -.equ STACK_TOP, 0x20082000 // top of stack -.equ STACK_LIMIT, 0x2007a000 // stack limit -.equ XOSC_BASE, 0x40048000 // XOSC base address -.equ XOSC_CTRL, XOSC_BASE + 0x00 // XOSC control register -.equ XOSC_STATUS, XOSC_BASE + 0x04 // XOSC status register -.equ XOSC_STARTUP, XOSC_BASE + 0x0c // XOSC startup register -.equ PPB_BASE, 0xe0000000 // PPB base address -.equ CPACR, PPB_BASE + 0x0ed88 // coprocessor access control -.equ CLOCKS_BASE, 0x40010000 // clocks base address -.equ CLK_PERI_CTRL, CLOCKS_BASE + 0x48 // peripheral clock control -.equ RESETS_BASE, 0x40020000 // resets base address -.equ RESETS_RESET, RESETS_BASE + 0x0 // reset register -.equ RESETS_RESET_CLEAR, RESETS_BASE + 0x3000 // reset clear (atomic) -.equ RESETS_RESET_DONE, RESETS_BASE + 0x8 // reset done register -.equ IO_BANK0_BASE, 0x40028000 // IO_BANK0 base address -.equ IO_BANK0_GPIO16_CTRL_OFFSET, 0x84 // GPIO16 control offset -.equ PADS_BANK0_BASE, 0x40038000 // PADS_BANK0 base address -.equ PADS_BANK0_GPIO16_OFFSET, 0x44 // GPIO16 pad offset -.equ UART0_BASE, 0x40070000 // UART0 base address diff --git a/drivers/0x01_uart_asm_arm/coprocessor.s b/drivers/0x01_uart_asm_arm/coprocessor.s deleted file mode 100644 index da5ad8f..0000000 --- a/drivers/0x01_uart_asm_arm/coprocessor.s +++ /dev/null @@ -1,46 +0,0 @@ -/** - * FILE: coprocessor.s - * - * DESCRIPTION: - * RP2350 Coprocessor Access Functions. - * - * BRIEF: - * Provides functions to enable coprocessor access control. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Enable coprocessor access. - * - * @details Grants full access to coprocessor 0 via CPACR. - * - * @param None - * @retval None - */ -.global Enable_Coprocessor -.type Enable_Coprocessor , %function -Enable_Coprocessor: - ldr r0, =CPACR // load CPACR address - ldr r1, [r0] // read CPACR value - orr r1, r1, #(1<<1) // set CP0: Ctrl access priv coproc 0 bit - orr r1, r1, #(1<<0) // set CP0: Ctrl access priv coproc 0 bit - str r1, [r0] // store value into CPACR - dsb // data sync barrier - isb // instruction sync barrier - bx lr // return diff --git a/drivers/0x01_uart_asm_arm/delay.s b/drivers/0x01_uart_asm_arm/delay.s deleted file mode 100644 index fa808d3..0000000 --- a/drivers/0x01_uart_asm_arm/delay.s +++ /dev/null @@ -1,53 +0,0 @@ -/** - * FILE: delay.s - * - * DESCRIPTION: - * RP2350 Delay Functions. - * - * BRIEF: - * Provides millisecond delay functions based on a 14.5MHz clock. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Delay_MS. - * - * @details Delays for r0 milliseconds. Conversion: loop_count = ms * 3600 - * based on a 14.5MHz clock. - * - * @param r0 - milliseconds - * @retval None - */ -.global Delay_MS -.type Delay_MS, %function -Delay_MS: -.Delay_MS_Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.Delay_MS_Check: - cmp r0, #0 // if MS is not valid, return - ble .Delay_MS_Done // branch if less or equal to 0 -.Delay_MS_Setup: - ldr r4, =3600 // loops per MS based on 14.5MHz clock - mul r5, r0, r4 // MS * 3600 -.Delay_MS_Loop: - subs r5, r5, #1 // decrement counter - bne .Delay_MS_Loop // branch until zero -.Delay_MS_Done: - pop {r4-r12, lr} // pop registers r4-r12, lr from the stack - bx lr // return diff --git a/drivers/0x01_uart_asm_arm/gpio.s b/drivers/0x01_uart_asm_arm/gpio.s deleted file mode 100644 index 1507f34..0000000 --- a/drivers/0x01_uart_asm_arm/gpio.s +++ /dev/null @@ -1,104 +0,0 @@ -/** - * FILE: gpio.s - * - * DESCRIPTION: - * RP2350 GPIO Functions. - * - * BRIEF: - * Provides GPIO configuration, set, and clear functions using - * coprocessor instructions. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Configure GPIO. - * - * @details Configures a GPIO pin's pad control and function select. - * - * @param r0 - PAD_OFFSET - * @param r1 - CTRL_OFFSET - * @param r2 - GPIO - * @retval None - */ -.global GPIO_Config -.type GPIO_Config, %function -GPIO_Config: -.GPIO_Config_Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.GPIO_Config_Modify_Pad: - ldr r4, =PADS_BANK0_BASE // load PADS_BANK0_BASE address - add r4, r4, r0 // PADS_BANK0_BASE + PAD_OFFSET - ldr r5, [r4] // read PAD_OFFSET value - bic r5, r5, #(1<<7) // clear OD bit - orr r5, r5, #(1<<6) // set IE bit - bic r5, r5, #(1<<8) // clear ISO bit - str r5, [r4] // store value into PAD_OFFSET -.GPIO_Config_Modify_CTRL: - ldr r4, =IO_BANK0_BASE // load IO_BANK0 base - add r4, r4, r1 // IO_BANK0_BASE + CTRL_OFFSET - ldr r5, [r4] // read CTRL_OFFSET value - bic r5, r5, #0x1f // clear FUNCSEL - orr r5, r5, #0x05 // set FUNCSEL 0x05->SIO_0 - str r5, [r4] // store value into CTRL_OFFSET -.GPIO_Config_Enable_OE: - ldr r4, =1 // enable output - mcrr p0, #4, r2, r4, c4 // gpioc_bit_oe_put(GPIO, 1) -.GPIO_Config_Pop_Registers: - pop {r4-r12, lr} // pop registers r4-r12, lr to the stack - bx lr // return - -/** - * @brief GPIO set. - * - * @details Drives GPIO output high via coprocessor. - * - * @param r0 - GPIO - * @retval None - */ -.global GPIO_Set -.type GPIO_Set, %function -GPIO_Set: -.GPIO_Set_Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.GPIO_Set_Execute: - ldr r4, =1 // enable output - mcrr p0, #4, r0, r4, c0 // gpioc_bit_out_put(GPIO, 1) -.GPIO_Set_Pop_Registers: - pop {r4-r12, lr} // pop registers r4-r12, lr from the stack - bx lr // return - -/** - * @brief GPIO clear. - * - * @details Drives GPIO output low via coprocessor. - * - * @param r0 - GPIO - * @retval None - */ -.global GPIO_Clear -.type GPIO_Clear, %function -GPIO_Clear: -.GPIO_Clear_Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.GPIO_Clear_Execute: - ldr r4, =0 // disable output - mcrr p0, #4, r0, r4, c0 // gpioc_bit_out_put(GPIO, 0) -.GPIO_Clear_Pop_Registers: - pop {r4-r12, lr} // pop registers r4-r12, lr from the stack - bx lr // return diff --git a/drivers/0x01_uart_asm_arm/image_def.s b/drivers/0x01_uart_asm_arm/image_def.s deleted file mode 100644 index cf97763..0000000 --- a/drivers/0x01_uart_asm_arm/image_def.s +++ /dev/null @@ -1,33 +0,0 @@ -/** - * FILE: image_def.s - * - * DESCRIPTION: - * RP2350 IMAGE_DEF Block. - * - * BRIEF: - * A minimum amount of metadata (a valid IMAGE_DEF block) must be embedded in any - * binary for the bootrom to recognise it as a valid program image, as opposed to, - * for example, blank flash contents or a disconnected flash device. This must - * appear within the first 4 kB of a flash image, or anywhere in a RAM or OTP image. - * Unlike RP2040, there is no requirement for flash binaries to have a checksummed - * "boot2" flash setup function at flash address 0. The RP2350 bootrom performs a - * simple best‑effort XIP setup during flash scanning, and a flash‑resident program - * can continue executing in this state, or can choose to reconfigure the QSPI - * interface at a later time for best performance. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: October 5, 2025 - * UPDATE DATE: October 5, 2025 - */ - -.section .picobin_block, "a" // place IMAGE_DEF block in flash - -.word 0xffffded3 // PICOBIN_BLOCK_MARKER_START -.byte 0x42 // PICOBIN_BLOCK_ITEM_1BS_IMAGE_TYPE -.byte 0x1 // item is 1 word in size -.hword 0b0001000000100001 // SECURE mode (0x1021) -.byte 0xff // PICOBIN_BLOCK_ITEM_2BS_LAST -.hword 0x0001 // item is 1 word in size -.byte 0x0 // pad -.word 0x0 // relative pointer to next block (0 = loop to self) -.word 0xab123579 // PICOBIN_BLOCK_MARKER_END diff --git a/drivers/0x01_uart_asm_arm/linker.ld b/drivers/0x01_uart_asm_arm/linker.ld deleted file mode 100644 index be415b1..0000000 --- a/drivers/0x01_uart_asm_arm/linker.ld +++ /dev/null @@ -1,91 +0,0 @@ -/** - * FILE: linker.ld - * - * DESCRIPTION: - * RP2350 Minimal Linker Script for bare‑metal development. - * - * BRIEF: - * Ensures the boot ROM accepts and runs the image by placing - * the IMAGE_DEF block first at 0x10000000, aligning the vector - * table to a 128‑byte boundary within the first 4 KB and defining - * a non‑secure stack region in SRAM. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: October 5, 2025 - * UPDATE DATE: October 5, 2025 - */ - -ENTRY(Reset_Handler) - -/** - * Define memory regions. - */ -__XIP_BASE = 0x10000000; -__XIP_SIZE = 32M; - -__SRAM_BASE = 0x20000000; -__SRAM_SIZE = 512K; /* non-secure window */ -__STACK_SIZE = 32K; - -MEMORY -{ - RAM (rwx) : ORIGIN = __SRAM_BASE, LENGTH = __SRAM_SIZE - FLASH (rx) : ORIGIN = __XIP_BASE, LENGTH = __XIP_SIZE -} - -/** - * Program headers. - */ -PHDRS -{ - text PT_LOAD FLAGS(5); /* RX */ -} - -/** - * Section placement. - */ -SECTIONS -{ - . = ORIGIN(FLASH); - - /** - * Minimal IMAGE_DEF must be first. - */ - .embedded_block : - { - KEEP(*(.embedded_block)) - } > FLASH :text - - /** - * Force the vector table section start to a 128-byte boundary. - */ - .vectors ALIGN(128) : - { - KEEP(*(.vectors)) - } > FLASH :text - - ASSERT(((ADDR(.vectors) - ORIGIN(FLASH)) < 0x1000), - "Vector table must be in first 4KB of flash") - - /** - * Text and read-only data. - */ - .text : - { - . = ALIGN(4); - *(.text*) - *(.rodata*) - KEEP(*(.ARM.attributes)) - } > FLASH :text - - /** - * Non-secure stack symbols. - */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); /* 0x20080000 */ - __StackLimit = __StackTop - __STACK_SIZE; - __stack = __StackTop; - - .stack (NOLOAD) : { . = ALIGN(8); } > RAM - - PROVIDE(__Vectors = ADDR(.vectors)); -} diff --git a/drivers/0x01_uart_asm_arm/main.s b/drivers/0x01_uart_asm_arm/main.s deleted file mode 100644 index fc03434..0000000 --- a/drivers/0x01_uart_asm_arm/main.s +++ /dev/null @@ -1,66 +0,0 @@ -/** - * FILE: main.s - * - * DESCRIPTION: - * RP2350 Bare-Metal UART Main Application. - * - * BRIEF: - * Main application entry point for RP2350 UART driver. Contains the - * main loop that echoes UART input to output. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 2, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Main application entry point. - * - * @details Implements the infinite echo loop. - * - * @param None - * @retval None - */ -.global main // export main -.type main, %function // mark as function -main: -.Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.Loop: - bl UART0_In // call UART0_In - bl UART0_Out // call UART0_Out - b .Loop // loop forever -.Pop_Registers: - pop {r4-r12, lr} // pop registers r4-r12, lr from the stack - bx lr // return to caller - -/** - * Test data and constants. - * The .rodata section is used for constants and static data. - */ -.section .rodata // read-only data section - -/** - * Initialized global data. - * The .data section is used for initialized global or static variables. - */ -.section .data // data section - -/** - * Uninitialized global data. - * The .bss section is used for uninitialized global or static variables. - */ -.section .bss // BSS section diff --git a/drivers/0x01_uart_asm_arm/reset.s b/drivers/0x01_uart_asm_arm/reset.s deleted file mode 100644 index df6abf2..0000000 --- a/drivers/0x01_uart_asm_arm/reset.s +++ /dev/null @@ -1,50 +0,0 @@ -/** - * FILE: reset.s - * - * DESCRIPTION: - * RP2350 Reset Controller Functions. - * - * BRIEF: - * Provides functions to initialize subsystems by clearing their - * reset bits in the Reset controller. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Init subsystem. - * - * @details Initiates the various subsystems by clearing their reset bits. - * - * @param None - * @retval None - */ -.global Init_Subsystem -.type Init_Subsystem, %function -Init_Subsystem: -.GPIO_Subsystem_Reset: - ldr r0, =RESETS_RESET // load RESETS->RESET address - ldr r1, [r0] // read RESETS->RESET value - bic r1, r1, #(1<<6) // clear IO_BANK0 bit - str r1, [r0] // store value into RESETS->RESET address -.GPIO_Subsystem_Reset_Wait: - ldr r0, =RESETS_RESET_DONE // load RESETS->RESET_DONE address - ldr r1, [r0] // read RESETS->RESET_DONE value - tst r1, #(1<<6) // test IO_BANK0 reset done - beq .GPIO_Subsystem_Reset_Wait // wait until done - bx lr // return diff --git a/drivers/0x01_uart_asm_arm/reset_handler.s b/drivers/0x01_uart_asm_arm/reset_handler.s deleted file mode 100644 index 4e416a5..0000000 --- a/drivers/0x01_uart_asm_arm/reset_handler.s +++ /dev/null @@ -1,53 +0,0 @@ -/** - * FILE: reset_handler.s - * - * DESCRIPTION: - * RP2350 Reset Handler. - * - * BRIEF: - * Entry point after reset. Performs initialization sequence including - * stack setup, oscillator configuration, subsystem initialization, and - * UART setup before branching to main application. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Reset handler for RP2350. - * - * @details Entry point after reset. Performs: - * - Stack initialization - * - Coprocessor enable - * - GPIO16 pad/function configuration - * - Branches to main() which contains the blink loop - * - * @param None - * @retval None - */ -.global Reset_Handler // export Reset_Handler symbol -.type Reset_Handler, %function -Reset_Handler: - bl Init_Stack // initialize MSP/PSP and limits - bl Init_XOSC // initialize external crystal oscillator - bl Enable_XOSC_Peri_Clock // enable XOSC peripheral clock - bl Init_Subsystem // initialize subsystems - bl UART_Release_Reset // ensure UART0 out of reset - bl UART_Init // initialize UART0 (pins, baud, enable) - bl Enable_Coprocessor // enable CP0 coprocessor - b main // branch to main loop -.size Reset_Handler, . - Reset_Handler diff --git a/drivers/0x01_uart_asm_arm/stack.s b/drivers/0x01_uart_asm_arm/stack.s deleted file mode 100644 index cd9375d..0000000 --- a/drivers/0x01_uart_asm_arm/stack.s +++ /dev/null @@ -1,47 +0,0 @@ -/** - * FILE: stack.s - * - * DESCRIPTION: - * RP2350 Stack Initialization. - * - * BRIEF: - * Provides stack pointer initialization for Main and Process Stack - * Pointers (MSP/PSP) and their limits. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Initialize stack pointers. - * - * @details Sets Main and Process Stack Pointers (MSP/PSP) and their limits. - * - * @param None - * @retval None - */ -.global Init_Stack -.type Init_Stack, %function -Init_Stack: - ldr r0, =STACK_TOP // load stack top - msr PSP, r0 // set PSP - ldr r0, =STACK_LIMIT // load stack limit - msr MSPLIM, r0 // set MSP limit - msr PSPLIM, r0 // set PSP limit - ldr r0, =STACK_TOP // reload stack top - msr MSP, r0 // set MSP - bx lr // return diff --git a/drivers/0x01_uart_asm_arm/uart.s b/drivers/0x01_uart_asm_arm/uart.s deleted file mode 100644 index c66ee2d..0000000 --- a/drivers/0x01_uart_asm_arm/uart.s +++ /dev/null @@ -1,149 +0,0 @@ -/** - * FILE: uart.s - * - * DESCRIPTION: - * RP2350 UART Functions. - * - * BRIEF: - * Provides UART initialization, transmit, and receive functions for - * UART0 on the RP2350. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Release UART0 from reset and wait until it is ready. - * - * @details Clears the UART0 reset bit in the Reset controller (RESETS->RESET) - * and polls the corresponding bit in RESETS->RESET_DONE until the - * UART0 block is no longer in reset. This ensures UART registers are - * accessible before configuring the peripheral. - * - * @param None - * @retval None - */ -.global UART_Release_Reset -.type UART_Release_Reset, %function -UART_Release_Reset: - ldr r0, =RESETS_RESET // load RESETS->RESET address - ldr r1, [r0] // read RESETS->RESET value - bic r1, r1, #(1<<26) // clear UART0 reset bit - str r1, [r0] // write value back to RESETS->RESET -.UART_Release_Reset_Wait: - ldr r0, =RESETS_RESET_DONE // load RESETS->RESET_DONE address - ldr r1, [r0] // read RESETS->RESET_DONE value - tst r1, #(1<<26) // test UART0 reset-done bit - beq .UART_Release_Reset_Wait // loop until UART0 is out of reset - bx lr // return - -/** - * @brief Initialize UART0 (pins, baud divisors, line control and enable). - * - * @details Configures IO_BANK0 pins 0 (TX) and 1 (RX) to the UART function - * and programs the corresponding pad controls in PADS_BANK0. It - * programs the integer and fractional baud divisors (UARTIBRD and - * UARTFBRD), configures UARTLCR_H for 8-bit transfers and FIFOs, - * and enables the UART (UARTCR: UARTEN + TXE + RXE). - * The routine assumes the UART0 base is available at the - * `UART0_BASE` symbol. The selected divisors (IBRD=6, FBRD=33) are - * chosen to match the expected peripheral clock; if your UART - * peripheral clock differs, adjust these values accordingly. - * - * @param None - * @retval None - */ -.global UART_Init -.type UART_Init, %function -UART_Init: - ldr r0, =IO_BANK0_BASE // load IO_BANK0 base - ldr r1, =2 // FUNCSEL = 2 -> select UART function - str r1, [r0, #4] // write FUNCSEL to GPIO0_CTRL (pin0 -> TX) - str r1, [r0, #0x0c] // write FUNCSEL to GPIO1_CTRL (pin1 -> RX) - ldr r0, =PADS_BANK0_BASE // load PADS_BANK0 base - add r0, r0, #0x04 // compute PAD[0] address (PADS + 0x04) - ldr r1, =0x04 // pad config value for TX - str r1, [r0] // write PAD0 config (TX pad) - ldr r0, =PADS_BANK0_BASE // load PADS_BANK0 base again - add r0, r0, #0x08 // compute PAD[1] address (PADS + 0x08) - ldr r1, =0x40 // pad config value for RX (pulldown/IE) - str r1, [r0] // write PAD1 config (RX pad) - ldr r0, =UART0_BASE // load UART0 base address - ldr r1, =0 // prepare 0 to disable UARTCR - str r1, [r0, #0x30] // UARTCR = 0 (disable UART while configuring) - ldr r1, =6 // integer baud divisor (IBRD = 6) - str r1, [r0, #0x24] // UARTIBRD = 6 (integer baud divisor) - ldr r1, =33 // fractional baud divisor (FBRD = 33) - str r1, [r0, #0x28] // UARTFBRD = 33 (fractional baud divisor) - ldr r1, =112 // UARTLCR_H = 0x70 (FIFO enable + 8-bit) - str r1, [r0, #0x2c] // UARTLCR_H = 0x70 - ldr r1, =3 // RXE/TXE mask - lsl r1, r1, #8 // shift RXE/TXE into bit positions 8..9 - orr r1, r1, #1 // set UARTEN bit (bit 0) - str r1, [r0, #0x30] // UARTCR = enable (UARTEN + TXE + RXE) - bx lr // return - -/** - * @brief UART0 transmit (blocking). - * - * @details Waits for TX FIFO to be not full, then writes the lowest 8 bits of r0 to UART0. - * Data to send must be in r0 on entry. - * - * @param r0: byte to transmit (lower 8 bits used) - * @retval None - */ -.global UART0_Out -.type UART0_Out, %function -UART0_Out: -.UART0_Out_Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.UART0_Out_loop: - ldr r4, =UART0_BASE // base address for uart0 registers - ldr r5, [r4, #0x18] // read UART0 flag register UARTFR into r5 - ldr r6, =32 // mask for bit 5, TX FIFO full (TXFF) - ands r5, r5, r6 // isolate TXFF bit and set flags - bne .UART0_Out_loop // if TX FIFO is full, loop - ldr r6, =0xff // mask for the 8 lowest bits - ands r0, r0, r6 // mask off upper bits of r0, keep lower 8 bits - str r0, [r4, #0] // write data to UARTDR -.UART0_Out_Pop_Registers: - pop {r4-r12, lr} // pop registers r4-r12, lr from the stack - bx lr // return - -/** - * @brief UART0 receive (blocking). - * - * @details Waits for RX FIFO to be not empty, then reads a byte from UART0 into r0. - * - * @param None - * @retval r0: received byte (lower 8 bits valid) - */ -.global UART0_In -.type UART0_In, %function -UART0_In: -.UART0_In_Push_Registers: - push {r4-r12, lr} // push registers r4-r12, lr to the stack -.UART0_In_loop: - ldr r4, =UART0_BASE // base address for uart0 registers - ldr r5, [r4, #0x18] // read UART0 flag register UARTFR into r5 - ldr r6, =16 // mask for bit 4, RX FIFO empty RXFE - ands r5, r5, r6 // isolate RXFE bit and set flags - bne .UART0_In_loop // if RX FIFO is empty, loop - ldr r0, [r4, #0] // load data from UARTDR into r0 -.UART0_In_Pop_Registers: - pop {r4-r12, lr} // pop registers r4-r12, lr from the stack - bx lr // return diff --git a/drivers/0x01_uart_asm_arm/vector_table.s b/drivers/0x01_uart_asm_arm/vector_table.s deleted file mode 100644 index c8b2f5f..0000000 --- a/drivers/0x01_uart_asm_arm/vector_table.s +++ /dev/null @@ -1,35 +0,0 @@ -/** - * FILE: vector_table.s - * - * DESCRIPTION: - * RP2350 Vector Table. - * - * BRIEF: - * Defines the vector table for the RP2350 containing the initial - * stack pointer and reset handler entry point. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .vectors section. The .vectors section contains vector - * table and Reset_Handler. - */ -.section .vectors, "ax" // vector table section -.align 2 // align to 4-byte boundary - -/** - * Vector table section. - */ -.global _vectors // export _vectors symbol -_vectors: - .word STACK_TOP // initial stack pointer - .word Reset_Handler + 1 // reset handler (Thumb bit set) diff --git a/drivers/0x01_uart_asm_arm/xosc.s b/drivers/0x01_uart_asm_arm/xosc.s deleted file mode 100644 index 576f44c..0000000 --- a/drivers/0x01_uart_asm_arm/xosc.s +++ /dev/null @@ -1,70 +0,0 @@ -/** - * FILE: xosc.s - * - * DESCRIPTION: - * RP2350 External Crystal Oscillator (XOSC) Functions. - * - * BRIEF: - * Provides functions to initialize the external crystal oscillator - * and enable the XOSC peripheral clock. - * - * AUTHOR: Kevin Thomas - * CREATION DATE: November 27, 2025 - * UPDATE DATE: November 27, 2025 - */ - -.syntax unified // use unified assembly syntax -.cpu cortex-m33 // target Cortex-M33 core -.thumb // use Thumb instruction set - -.include "constants.s" - -/** - * Initialize the .text section. - * The .text section contains executable code. - */ -.section .text // code section -.align 2 // align to 4-byte boundary - -/** - * @brief Init XOSC and wait until it is ready. - * - * @details Configures and initializes the external crystal oscillator (XOSC). - * Waits for the XOSC to become stable before returning. - * - * @param None - * @retval None - */ -.global Init_XOSC -.type Init_XOSC, %function -Init_XOSC: - ldr r0, =XOSC_STARTUP // load XOSC_STARTUP address - ldr r1, =0x00c4 // set delay 50,000 cycles - str r1, [r0] // store value into XOSC_STARTUP - ldr r0, =XOSC_CTRL // load XOSC_CTRL address - ldr r1, =0x00FABAA0 // set 1_15MHz, freq range, actual 14.5MHz - str r1, [r0] // store value into XOSC_CTRL -.Init_XOSC_Wait: - ldr r0, =XOSC_STATUS // load XOSC_STATUS address - ldr r1, [r0] // read XOSC_STATUS value - tst r1, #(1<<31) // test STABLE bit - beq .Init_XOSC_Wait // wait until stable bit is set - bx lr // return - -/** - * @brief Enable XOSC peripheral clock. - * - * @details Sets the peripheral clock to use XOSC as its AUXSRC. - * - * @param None - * @retval None - */ -.global Enable_XOSC_Peri_Clock -.type Enable_XOSC_Peri_Clock, %function -Enable_XOSC_Peri_Clock: - ldr r0, =CLK_PERI_CTRL // load CLK_PERI_CTRL address - ldr r1, [r0] // read CLK_PERI_CTRL value - orr r1, r1, #(1<<11) // set ENABLE bit - orr r1, r1, #(4<<5) // set AUXSRC: XOSC_CLKSRC bit - str r1, [r0] // store value into CLK_PERI_CTRL - bx lr // return