mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
synced 2026-07-25 05:10:53 +02:00
refactor: enforce max 8 code lines, add docstrings, fix warnings across all Rust and C SDK projects
Rust (all 15 projects):
- Refactored overlength functions: format_counter, format_u8, format_f32_1,
format_u32_minimal, gpio_drive, read_sensor, poll_sensor, format_round_trip,
format_u32, prepare_write_buf, write_min_digits, write_temp, UartDriver::init,
init_spi, angle_to_pulse_us, compute_servo_level
- Added 200+ docstrings to test functions, mock structs, impl blocks
- Fixed pub static comments (//) to doc comments (///) in all main.rs files
- Fixed helper function ordering (helpers above callers)
- Fixed Fn(u32) -> FnMut(u32) bound in button poll_button
- Moved OneShot trait import from main.rs to board.rs in adc project
- Added unsafe {} blocks in flash unsafe fn bodies (Rust 2024 edition)
- Removed unused hal::Clock imports from pwm/servo main.rs
- All 15 projects build with zero errors and zero warnings
C Pico SDK (all 15 projects):
- Added docstrings to all public functions, macros, and static variables
- All 15 projects rebuilt with zero errors
Cleanup:
- Removed build/ and target/ directories from git tracking
- Added target/ to .gitignore
- Deleted temporary fix_rust_docs.py script
This commit is contained in:
Kevin Thomas
@@ -41,10 +41,10 @@ use hal::sio::{Sio, SioFifo};
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use hal::uart::{DataBits, Enabled, StopBits, UartConfig, UartPeripheral};
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// Alias our HAL crate
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#[cfg(rp2350)]
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use rp235x_hal as hal;
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#[cfg(rp2040)]
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use rp2040_hal as hal;
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#[cfg(rp2350)]
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use rp235x_hal as hal;
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/// External crystal frequency in Hz (12 MHz).
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pub(crate) const XTAL_FREQ_HZ: u32 = 12_000_000u32;
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@@ -86,7 +86,13 @@ pub(crate) fn init_clocks(
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watchdog: &mut hal::Watchdog,
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) -> hal::clocks::ClocksManager {
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hal::clocks::init_clocks_and_plls(
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XTAL_FREQ_HZ, xosc, clocks, pll_sys, pll_usb, resets, watchdog,
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XTAL_FREQ_HZ,
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xosc,
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clocks,
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pll_sys,
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pll_usb,
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resets,
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watchdog,
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)
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.unwrap()
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}
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@@ -127,18 +133,6 @@ pub(crate) fn init_delay(clocks: &hal::clocks::ClocksManager) -> cortex_m::delay
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cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().to_Hz())
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}
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/// Launch core 1 with its FIFO echo task.
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pub(crate) fn spawn_core1(
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psm: &mut hal::pac::PSM,
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ppb: &mut hal::pac::PPB,
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fifo: &mut SioFifo,
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) {
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let mut mc = Multicore::new(psm, ppb, fifo);
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let cores = mc.cores();
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let core1 = &mut cores[1];
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let _ = core1.spawn(CORE1_STACK.take().unwrap(), move || core1_entry());
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}
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/// Core 1 entry point: receive values via FIFO, increment, and return.
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fn core1_entry() -> ! {
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let pac = unsafe { hal::pac::Peripherals::steal() };
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@@ -150,6 +144,14 @@ fn core1_entry() -> ! {
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}
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}
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/// Launch core 1 with its FIFO echo task.
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pub(crate) fn spawn_core1(psm: &mut hal::pac::PSM, ppb: &mut hal::pac::PPB, fifo: &mut SioFifo) {
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let mut mc = Multicore::new(psm, ppb, fifo);
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let cores = mc.cores();
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let core1 = &mut cores[1];
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let _ = core1.spawn(CORE1_STACK.take().unwrap(), move || core1_entry());
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}
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/// Send the counter to core 1 via FIFO and print the round-trip result.
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pub(crate) fn send_and_print(
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fifo: &mut SioFifo,
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@@ -173,13 +175,22 @@ pub(crate) fn send_and_print(
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/// * `pac` - PAC Peripherals singleton (consumed).
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pub(crate) fn run(mut pac: hal::pac::Peripherals) -> ! {
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let mut wd = hal::Watchdog::new(pac.WATCHDOG);
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let clocks = init_clocks(pac.XOSC, pac.CLOCKS, pac.PLL_SYS, pac.PLL_USB, &mut pac.RESETS, &mut wd);
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let clocks = init_clocks(
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pac.XOSC,
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pac.CLOCKS,
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pac.PLL_SYS,
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pac.PLL_USB,
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&mut pac.RESETS,
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&mut wd,
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);
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let (pins, mut fifo) = init_pins(pac.IO_BANK0, pac.PADS_BANK0, pac.SIO, &mut pac.RESETS);
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let uart = init_uart(pac.UART0, pins.gpio0, pins.gpio1, &mut pac.RESETS, &clocks);
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let mut delay = init_delay(&clocks);
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spawn_core1(&mut pac.PSM, &mut pac.PPB, &mut fifo);
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let mut counter = 0u32;
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loop { send_and_print(&mut fifo, &uart, &mut counter, &mut delay); }
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loop {
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send_and_print(&mut fifo, &uart, &mut counter, &mut delay);
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}
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}
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// End of file
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@@ -61,13 +61,13 @@ use rp235x_hal as hal;
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#[cfg(rp2040)]
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use rp2040_hal as hal;
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// Second-stage boot loader for RP2040
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/// Second-stage boot loader for RP2040
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#[unsafe(link_section = ".boot2")]
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#[used]
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#[cfg(rp2040)]
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pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_W25Q080;
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// Boot metadata for the RP2350 Boot ROM
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/// Boot metadata for the RP2350 Boot ROM
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#[unsafe(link_section = ".start_block")]
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#[used]
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#[cfg(rp2350)]
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@@ -79,7 +79,7 @@ fn main() -> ! {
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board::run(hal::pac::Peripherals::take().unwrap())
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}
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// Picotool binary info metadata
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/// Picotool binary info metadata
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#[unsafe(link_section = ".bi_entries")]
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#[used]
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pub static PICOTOOL_ENTRIES: [hal::binary_info::EntryAddr; 5] = [
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@@ -60,24 +60,28 @@ fn reverse_copy(buf: &mut [u8], tmp: &[u8], n: usize) {
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}
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}
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/// Copy a byte slice into `buf` at the given offset, returning bytes written.
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fn copy_slice(buf: &mut [u8], offset: usize, src: &[u8]) -> usize {
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buf[offset..offset + src.len()].copy_from_slice(src);
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src.len()
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}
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/// Append a CRLF sequence at `pos` in `buf` and return the new position.
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fn append_crlf(buf: &mut [u8], pos: usize) -> usize {
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buf[pos] = b'\r';
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buf[pos + 1] = b'\n';
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pos + 2
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}
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/// Format the round-trip message for UART output.
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///
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/// Produces: `core0 sent: N, core1 returned: N\r\n`
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pub fn format_round_trip(buf: &mut [u8], sent: u32, returned: u32) -> usize {
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let prefix = b"core0 sent: ";
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let middle = b", core1 returned: ";
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let mut pos = 0usize;
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buf[pos..pos + prefix.len()].copy_from_slice(prefix);
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pos += prefix.len();
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let mut pos = copy_slice(buf, 0, b"core0 sent: ");
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pos += format_u32(&mut buf[pos..], sent);
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buf[pos..pos + middle.len()].copy_from_slice(middle);
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pos += middle.len();
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pos += copy_slice(buf, pos, b", core1 returned: ");
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pos += format_u32(&mut buf[pos..], returned);
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buf[pos] = b'\r';
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pos += 1;
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buf[pos] = b'\n';
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pos += 1;
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pos
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append_crlf(buf, pos)
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}
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#[cfg(test)]
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@@ -85,17 +89,20 @@ mod tests {
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// Import all parent module items
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use super::*;
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/// Increment value adds one.
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#[test]
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fn increment_value_adds_one() {
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assert_eq!(increment_value(0), 1);
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assert_eq!(increment_value(41), 42);
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}
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/// Increment value wraps at max.
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#[test]
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fn increment_value_wraps_at_max() {
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assert_eq!(increment_value(u32::MAX), 0);
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}
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/// Format u32 zero.
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#[test]
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fn format_u32_zero() {
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let mut buf = [0u8; 10];
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@@ -103,6 +110,7 @@ mod tests {
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assert_eq!(&buf[..n], b"0");
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}
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/// Format u32 single digit.
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#[test]
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fn format_u32_single_digit() {
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let mut buf = [0u8; 10];
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@@ -110,6 +118,7 @@ mod tests {
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assert_eq!(&buf[..n], b"7");
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}
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/// Format u32 multi digit.
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#[test]
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fn format_u32_multi_digit() {
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let mut buf = [0u8; 10];
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@@ -117,6 +126,7 @@ mod tests {
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assert_eq!(&buf[..n], b"12345");
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}
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/// Format u32 max.
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#[test]
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fn format_u32_max() {
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let mut buf = [0u8; 10];
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@@ -124,6 +134,7 @@ mod tests {
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assert_eq!(&buf[..n], b"4294967295");
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}
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/// Format round trip small values.
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#[test]
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fn format_round_trip_small_values() {
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let mut buf = [0u8; 52];
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@@ -131,6 +142,7 @@ mod tests {
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assert_eq!(&buf[..n], b"core0 sent: 0, core1 returned: 1\r\n");
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}
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/// Format round trip larger values.
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#[test]
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fn format_round_trip_larger_values() {
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let mut buf = [0u8; 52];
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@@ -138,6 +150,7 @@ mod tests {
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assert_eq!(&buf[..n], b"core0 sent: 42, core1 returned: 43\r\n");
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}
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/// Format round trip max values.
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#[test]
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fn format_round_trip_max_values() {
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let mut buf = [0u8; 52];
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@@ -1 +0,0 @@
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@@ -1,3 +0,0 @@
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Signature: 8a477f597d28d172789f06886806bc55
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# This file is a cache directory tag created by cargo.
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# For information about cache directory tags see https://bford.info/cachedir/
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9c30c65be230501a
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||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user