From e36a1a537f5b7990d8fb9a5efa987457f5f7cdd0 Mon Sep 17 00:00:00 2001 From: Kevin Thomas Date: Sun, 5 Apr 2026 17:34:07 -0400 Subject: [PATCH] Add bare-metal ADC driver for RP2350 (0x06_adc_cbm) --- .../.vscode/c_cpp_properties.json | 45 ++ drivers/0x06_adc_cbm/.vscode/extensions.json | 9 + drivers/0x06_adc_cbm/.vscode/launch.json | 47 ++ drivers/0x06_adc_cbm/.vscode/settings.json | 40 ++ drivers/0x06_adc_cbm/.vscode/tasks.json | 128 +++++ drivers/0x06_adc_cbm/Inc/rp2350.h | 233 ++++++++++ drivers/0x06_adc_cbm/Inc/rp2350_adc.h | 75 +++ drivers/0x06_adc_cbm/Inc/rp2350_coprocessor.h | 33 ++ drivers/0x06_adc_cbm/Inc/rp2350_delay.h | 34 ++ drivers/0x06_adc_cbm/Inc/rp2350_reset.h | 33 ++ .../0x06_adc_cbm/Inc/rp2350_reset_handler.h | 33 ++ drivers/0x06_adc_cbm/Inc/rp2350_stack.h | 34 ++ drivers/0x06_adc_cbm/Inc/rp2350_uart.h | 73 +++ drivers/0x06_adc_cbm/Inc/rp2350_xosc.h | 46 ++ drivers/0x06_adc_cbm/Makefile | 79 ++++ drivers/0x06_adc_cbm/Src/image_def.c | 35 ++ drivers/0x06_adc_cbm/Src/main.c | 111 +++++ drivers/0x06_adc_cbm/Src/rp2350_adc.c | 159 +++++++ drivers/0x06_adc_cbm/Src/rp2350_coprocessor.c | 34 ++ drivers/0x06_adc_cbm/Src/rp2350_delay.c | 39 ++ drivers/0x06_adc_cbm/Src/rp2350_reset.c | 33 ++ .../0x06_adc_cbm/Src/rp2350_reset_handler.c | 46 ++ drivers/0x06_adc_cbm/Src/rp2350_stack.c | 38 ++ drivers/0x06_adc_cbm/Src/rp2350_uart.c | 126 +++++ drivers/0x06_adc_cbm/Src/rp2350_xosc.c | 51 ++ drivers/0x06_adc_cbm/Src/vector_table.c | 38 ++ drivers/0x06_adc_cbm/linker.ld | 114 +++++ drivers/0x06_adc_cbm/uf2conv.py | 438 ++++++++++++++++++ drivers/0x06_adc_cbm/uf2families.json | 22 + 29 files changed, 2226 insertions(+) create mode 100644 drivers/0x06_adc_cbm/.vscode/c_cpp_properties.json create mode 100644 drivers/0x06_adc_cbm/.vscode/extensions.json create mode 100644 drivers/0x06_adc_cbm/.vscode/launch.json create mode 100644 drivers/0x06_adc_cbm/.vscode/settings.json create mode 100644 drivers/0x06_adc_cbm/.vscode/tasks.json create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_adc.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_coprocessor.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_delay.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_reset.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_reset_handler.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_stack.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_uart.h create mode 100644 drivers/0x06_adc_cbm/Inc/rp2350_xosc.h create mode 100644 drivers/0x06_adc_cbm/Makefile create mode 100644 drivers/0x06_adc_cbm/Src/image_def.c create mode 100644 drivers/0x06_adc_cbm/Src/main.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_adc.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_coprocessor.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_delay.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_reset.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_reset_handler.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_stack.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_uart.c create mode 100644 drivers/0x06_adc_cbm/Src/rp2350_xosc.c create mode 100644 drivers/0x06_adc_cbm/Src/vector_table.c create mode 100644 drivers/0x06_adc_cbm/linker.ld create mode 100644 drivers/0x06_adc_cbm/uf2conv.py create mode 100644 drivers/0x06_adc_cbm/uf2families.json diff --git a/drivers/0x06_adc_cbm/.vscode/c_cpp_properties.json b/drivers/0x06_adc_cbm/.vscode/c_cpp_properties.json new file mode 100644 index 0000000..60ea1fe --- /dev/null +++ b/drivers/0x06_adc_cbm/.vscode/c_cpp_properties.json @@ -0,0 +1,45 @@ +{ + "configurations": [ + { + "name": "ARM GCC", + "includePath": [ + "${workspaceFolder}/Inc/**" + ], + "defines": [ + "__GNUC__", + "__ARM_ARCH_8M_MAIN__", + "__ARMCC_VERSION" + ], + "compilerPath": "${userHome}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gcc", + "compileCommands": "${workspaceFolder}/compile_commands.json", + "cStandard": "c11", + "cppStandard": "c++17", + "intelliSenseMode": "gcc-arm", + "compilerArgs": [ + "-mcpu=cortex-m33", + "-mthumb" + ] + }, + { + "name": "ARM GCC (Windows)", + "includePath": [ + "${workspaceFolder}/Inc/**" + ], + "defines": [ + "__GNUC__", + "__ARM_ARCH_8M_MAIN__", + "__ARMCC_VERSION" + ], + "compilerPath": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gcc.exe", + "compileCommands": "${workspaceFolder}/compile_commands.json", + "cStandard": "c11", + "cppStandard": "c++17", + "intelliSenseMode": "gcc-arm", + "compilerArgs": [ + "-mcpu=cortex-m33", + "-mthumb" + ] + } + ], + "version": 4 +} \ No newline at end of file diff --git a/drivers/0x06_adc_cbm/.vscode/extensions.json b/drivers/0x06_adc_cbm/.vscode/extensions.json new file mode 100644 index 0000000..a940d7c --- /dev/null +++ b/drivers/0x06_adc_cbm/.vscode/extensions.json @@ -0,0 +1,9 @@ +{ + "recommendations": [ + "marus25.cortex-debug", + "ms-vscode.cpptools", + "ms-vscode.cpptools-extension-pack", + "ms-vscode.vscode-serial-monitor", + "raspberry-pi.raspberry-pi-pico" + ] +} \ No newline at end of file diff --git a/drivers/0x06_adc_cbm/.vscode/launch.json b/drivers/0x06_adc_cbm/.vscode/launch.json new file mode 100644 index 0000000..0c300c1 --- /dev/null +++ b/drivers/0x06_adc_cbm/.vscode/launch.json @@ -0,0 +1,47 @@ +{ + "version": "0.2.0", + "configurations": [ + { + "name": "Debug RP2350 (OpenOCD)", + "cwd": "${workspaceFolder}", + "executable": "${workspaceFolder}/build/adc.elf", + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "serverpath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd", + "searchDir": [ + "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts" + ], + "gdbPath": "${userHome}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gdb", + "device": "RP2350", + "configFiles": [ + "interface/cmsis-dap.cfg", + "target/rp2350.cfg" + ], + "svdFile": "${userHome}/.pico-sdk/sdk/2.2.0/src/rp2350/hardware_regs/RP2350.svd", + "overrideLaunchCommands": [ + "set arch armv8-m.main", + "set output-radix 16", + "monitor reset init", + "load", + "monitor reset halt" + ], + "openOCDPreConfigLaunchCommands": [ + "set USE_CORE { cm0 cm1 }" + ], + "openOCDLaunchCommands": [ + "adapter speed 5000" + ], + "preLaunchTask": "Compile Project", + "showDevDebugOutput": "raw", + "windows": { + "serverpath": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe", + "searchDir": [ + "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/scripts" + ], + "gdbPath": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gdb.exe", + "svdFile": "${env:USERPROFILE}/.pico-sdk/sdk/2.2.0/src/rp2350/hardware_regs/RP2350.svd" + } + } + ] +} \ No newline at end of file diff --git a/drivers/0x06_adc_cbm/.vscode/settings.json b/drivers/0x06_adc_cbm/.vscode/settings.json new file mode 100644 index 0000000..05d7bce --- /dev/null +++ b/drivers/0x06_adc_cbm/.vscode/settings.json @@ -0,0 +1,40 @@ +{ + "cmake.showSystemKits": false, + "cmake.options.statusBarVisibility": "hidden", + "cmake.options.advanced": { + "build": { + "statusBarVisibility": "hidden" + }, + "launch": { + "statusBarVisibility": "hidden" + }, + "debug": { + "statusBarVisibility": "hidden" + } + }, + "cmake.configureOnEdit": false, + "cmake.automaticReconfigure": false, + "cmake.configureOnOpen": false, + "cmake.generator": "Ninja", + "cmake.cmakePath": "${userHome}/.pico-sdk/cmake/v3.31.5/bin/cmake", + "C_Cpp.debugShortcut": false, + "terminal.integrated.env.windows": { + "PICO_SDK_PATH": "${env:USERPROFILE}/.pico-sdk/sdk/2.2.0", + "PICO_TOOLCHAIN_PATH": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1", + "Path": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1/bin;${env:USERPROFILE}/.pico-sdk/picotool/2.2.0-a4/picotool;${env:USERPROFILE}/.pico-sdk/cmake/v3.31.5/bin;${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1;${env:PATH}" + }, + "terminal.integrated.env.osx": { + "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.2.0", + "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1", + "PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.2.0-a4/picotool:${env:HOME}/.pico-sdk/cmake/v3.31.5/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}" + }, + "terminal.integrated.env.linux": { + "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.2.0", + "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1", + "PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.2.0-a4/picotool:${env:HOME}/.pico-sdk/cmake/v3.31.5/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}" + }, + "raspberry-pi-pico.cmakeAutoConfigure": true, + "raspberry-pi-pico.useCmakeTools": false, + "raspberry-pi-pico.cmakePath": "${HOME}/.pico-sdk/cmake/v3.31.5/bin/cmake", + "raspberry-pi-pico.ninjaPath": "${HOME}/.pico-sdk/ninja/v1.12.1/ninja" +} \ No newline at end of file diff --git a/drivers/0x06_adc_cbm/.vscode/tasks.json b/drivers/0x06_adc_cbm/.vscode/tasks.json new file mode 100644 index 0000000..0b2c8ce --- /dev/null +++ b/drivers/0x06_adc_cbm/.vscode/tasks.json @@ -0,0 +1,128 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "label": "Compile Project", + "type": "shell", + "command": "make", + "group": { + "kind": "build", + "isDefault": true + }, + "presentation": { + "reveal": "always", + "panel": "dedicated" + }, + "problemMatcher": "$gcc", + "windows": { + "command": ".\\build.bat" + } + }, + { + "label": "Clean Project", + "type": "shell", + "command": "make clean", + "group": "build", + "presentation": { + "reveal": "always", + "panel": "dedicated" + }, + "problemMatcher": [], + "windows": { + "command": ".\\clean.bat" + } + }, + { + "label": "Run Project", + "type": "shell", + "command": "${userHome}/.pico-sdk/picotool/2.2.0-a4/picotool/picotool", + "args": [ + "load", + "build/adc.uf2", + "-fx" + ], + "presentation": { + "reveal": "always", + "panel": "dedicated" + }, + "problemMatcher": [], + "dependsOn": [ + "Compile Project" + ], + "windows": { + "command": "${env:USERPROFILE}/.pico-sdk/picotool/2.2.0-a4/picotool/picotool.exe" + } + }, + { + "label": "Flash", + "type": "shell", + "command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd", + "args": [ + "-s", + "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts", + "-f", + "interface/cmsis-dap.cfg", + "-f", + "target/rp2350.cfg", + "-c", + "adapter speed 5000; program build/adc.elf verify reset exit" + ], + "problemMatcher": [], + "dependsOn": [ + "Compile Project" + ], + "windows": { + "command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe" + } + }, + { + "label": "Rescue Reset", + "type": "process", + "command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd", + "args": [ + "-s", + "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts", + "-f", + "interface/cmsis-dap.cfg", + "-f", + "target/${command:raspberry-pi-pico.getChip}-rescue.cfg", + "-c", + "adapter speed 5000; reset halt; exit" + ], + "problemMatcher": [], + "windows": { + "command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe" + } + }, + { + "label": "RISC-V Reset (RP2350)", + "type": "process", + "command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd", + "args": [ + "-s", + "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts", + "-c", + "set USE_CORE { rv0 rv1 cm0 cm1 }", + "-f", + "interface/cmsis-dap.cfg", + "-f", + "target/rp2350.cfg", + "-c", + "adapter speed 5000; init;", + "-c", + "write_memory 0x40120158 8 { 0x3 }; echo [format \"Info : ARCHSEL 0x%02x\" [read_memory 0x40120158 8 1]];", + "-c", + "reset halt; targets rp2350.rv0; echo [format \"Info : ARCHSEL_STATUS 0x%02x\" [read_memory 0x4012015C 8 1]]; exit" + ], + "problemMatcher": [], + "windows": { + "command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe" + } + } + ] +} +], +"problemMatcher": [] +} +] +} \ No newline at end of file diff --git a/drivers/0x06_adc_cbm/Inc/rp2350.h b/drivers/0x06_adc_cbm/Inc/rp2350.h new file mode 100644 index 0000000..ca17c12 --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350.h @@ -0,0 +1,233 @@ +/** + ****************************************************************************** + * @file rp2350.h + * @author Kevin Thomas + * @brief RP2350 Device Peripheral Access Layer Header File. + * + * Memory-mapped register structures and peripheral base addresses + * for the RP2350 microcontroller (Cortex-M33 dual-core). All + * register offsets verified against the RP2350 datasheet + * (RP-008373-DS-2). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_H +#define __RP2350_H + +#include +#include + +/*!< Defines 'read / write' permissions */ +#define __IO volatile + +/*!< Stack addresses */ +#define STACK_TOP 0x20082000UL +#define STACK_LIMIT 0x2007A000UL + +/*!< Memory map */ +#define XIP_BASE 0x10000000UL +#define SRAM_BASE 0x20000000UL +#define SIO_BASE 0xD0000000UL +#define PPB_BASE 0xE0000000UL + +/*!< APB peripherals */ +#define CLOCKS_BASE 0x40010000UL +#define RESETS_BASE 0x40020000UL +#define IO_BANK0_BASE 0x40028000UL +#define PADS_BANK0_BASE 0x40038000UL +#define XOSC_BASE 0x40048000UL +#define UART0_BASE 0x40070000UL +#define ADC_BASE 0x400A0000UL + +/** + * @brief XOSC (External Crystal Oscillator) + */ +typedef struct +{ + __IO uint32_t CTRL; // Control register Address offset: 0x00 + __IO uint32_t STATUS; // Status register Address offset: 0x04 + __IO uint32_t DORMANT; // Dormant mode Address offset: 0x08 + __IO uint32_t STARTUP; // Startup delay Address offset: 0x0C + __IO uint32_t COUNT; // Frequency count Address offset: 0x10 +} XOSC_TypeDef; + +/** + * @brief CLOCKS + */ +typedef struct +{ + __IO uint32_t RESERVED0[18]; // Other clock registers Address offset: 0x00-0x44 + __IO uint32_t CLK_PERI_CTRL; // Peripheral clock control Address offset: 0x48 + __IO uint32_t RESERVED1[8]; // CLK_PERI_DIV..CLK_USB_SELECTED Address offset: 0x4C-0x68 + __IO uint32_t CLK_ADC_CTRL; // ADC clock control Address offset: 0x6C +} CLOCKS_TypeDef; + +/** + * @brief RESETS + */ +typedef struct +{ + __IO uint32_t RESET; // Reset control Address offset: 0x00 + __IO uint32_t WDSEL; // Watchdog select Address offset: 0x04 + __IO uint32_t RESET_DONE; // Reset done status Address offset: 0x08 +} RESETS_TypeDef; + +/** + * @brief IO_BANK0 GPIO Control (one per GPIO) + */ +typedef struct +{ + __IO uint32_t STATUS; // GPIO status Address offset: 0x00 + __IO uint32_t CTRL; // GPIO control Address offset: 0x04 +} IO_BANK0_GPIO_TypeDef; + +/** + * @brief IO_BANK0 + */ +typedef struct +{ + IO_BANK0_GPIO_TypeDef GPIO[30]; // GPIO 0-29 status/ctrl pairs Address offset: 0x000-0x0E8 +} IO_BANK0_TypeDef; + +/** + * @brief PADS_BANK0 + */ +typedef struct +{ + __IO uint32_t VOLTAGE_SELECT; // Voltage select Address offset: 0x00 + __IO uint32_t GPIO[30]; // GPIO 0-29 pad control Address offset: 0x04-0x78 +} PADS_BANK0_TypeDef; + +/** + * @brief ADC (Analog-to-Digital Converter) + */ +typedef struct +{ + __IO uint32_t CS; // Control and status Address offset: 0x00 + __IO uint32_t RESULT; // Conversion result Address offset: 0x04 +} ADC_TypeDef; + +/** + * @brief Peripheral Definitions + */ +#define XOSC ((XOSC_TypeDef *) XOSC_BASE) +#define CLOCKS ((CLOCKS_TypeDef *) CLOCKS_BASE) +#define RESETS ((RESETS_TypeDef *) RESETS_BASE) +#define IO_BANK0 ((IO_BANK0_TypeDef *) IO_BANK0_BASE) +#define PADS_BANK0 ((PADS_BANK0_TypeDef *) PADS_BANK0_BASE) +#define ADC ((ADC_TypeDef *) ADC_BASE) +#define SIO ((volatile uint32_t *) SIO_BASE) +#define CPACR ((volatile uint32_t *) (PPB_BASE + 0x0ED88UL)) + +/** + * @brief XOSC bit definitions + */ +#define XOSC_STATUS_STABLE_SHIFT 31U + +/** + * @brief CPACR bit definitions + */ +#define CPACR_CP0_SHIFT 0U +#define CPACR_CP1_SHIFT 1U + +/** + * @brief CLOCKS bit definitions + */ +#define CLK_PERI_CTRL_ENABLE_SHIFT 11U +#define CLK_PERI_CTRL_AUXSRC_SHIFT 5U +#define CLK_PERI_CTRL_AUXSRC_MASK (0x07U << CLK_PERI_CTRL_AUXSRC_SHIFT) +#define CLK_PERI_CTRL_AUXSRC_XOSC 4U + +/** + * @brief CLK_ADC bit definitions + */ +#define CLK_ADC_CTRL_ENABLE_SHIFT 11U +#define CLK_ADC_CTRL_AUXSRC_SHIFT 5U +#define CLK_ADC_CTRL_AUXSRC_MASK (0x07U << CLK_ADC_CTRL_AUXSRC_SHIFT) +#define CLK_ADC_CTRL_AUXSRC_XOSC 3U + +/** + * @brief RESETS bit definitions + */ +#define RESETS_RESET_IO_BANK0_SHIFT 6U +#define RESETS_RESET_ADC_SHIFT 0U +#define RESETS_RESET_UART0_SHIFT 26U + +/** + * @brief IO_BANK0 bit definitions + */ +#define IO_BANK0_CTRL_FUNCSEL_MASK 0x1FU +#define IO_BANK0_CTRL_FUNCSEL_UART 0x02U +#define IO_BANK0_CTRL_FUNCSEL_SIO 0x05U +#define IO_BANK0_CTRL_FUNCSEL_NULL 0x1FU + +/** + * @brief PADS_BANK0 bit definitions + */ +#define PADS_BANK0_OD_SHIFT 7U +#define PADS_BANK0_IE_SHIFT 6U +#define PADS_BANK0_ISO_SHIFT 8U + +/** + * @brief UART register offsets (word indices from UART0_BASE) + */ +#define UART_DR_OFFSET (0x000U / 4U) +#define UART_FR_OFFSET (0x018U / 4U) +#define UART_IBRD_OFFSET (0x024U / 4U) +#define UART_FBRD_OFFSET (0x028U / 4U) +#define UART_LCR_H_OFFSET (0x02CU / 4U) +#define UART_CR_OFFSET (0x030U / 4U) + +/** + * @brief UART flag register bit definitions + */ +#define UART_FR_TXFF_MASK 32U +#define UART_FR_RXFE_MASK 16U + +/** + * @brief UART line control and enable values + */ +#define UART_LCR_H_8N1_FIFO 0x70U +#define UART_CR_ENABLE ((3U << 8) | 1U) + +/** + * @brief GPIO pin definitions + */ +#define ADC_PIN 26U +#define ADC_CHANNEL 0U +#define ADC_TEMP_CHANNEL 4U + +/** + * @brief PADS_BANK0 drive strength value + */ +#define PADS_BANK0_DRIVE_4MA (1U << 4) + +/** + * @brief ADC CS register bit definitions + */ +#define ADC_CS_EN_SHIFT 0U +#define ADC_CS_TS_EN_SHIFT 1U +#define ADC_CS_START_ONCE_SHIFT 2U +#define ADC_CS_READY_SHIFT 8U +#define ADC_CS_AINSEL_SHIFT 12U +#define ADC_CS_AINSEL_MASK (0x0FU << ADC_CS_AINSEL_SHIFT) + +/** + * @brief ADC conversion constants + */ +#define ADC_VREF_MV 3300U +#define ADC_FULL_SCALE 4095U +#define ADC_READY_TIMEOUT 1000000U + +#endif /* __RP2350_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_adc.h b/drivers/0x06_adc_cbm/Inc/rp2350_adc.h new file mode 100644 index 0000000..6f9631d --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_adc.h @@ -0,0 +1,75 @@ +/** + ****************************************************************************** + * @file rp2350_adc.h + * @author Kevin Thomas + * @brief Header for RP2350 12-bit ADC driver. + * + * Provides functions to initialise the ADC peripheral, read an + * analog voltage in millivolts from GPIO26 (channel 0), and read + * the on-chip temperature sensor (channel 4) in tenths of degrees + * Celsius. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_ADC_H +#define __RP2350_ADC_H + +#include "rp2350.h" + +/** + * @brief Release the ADC subsystem from reset. + * + * Clears the ADC bit in the RESETS register and waits until + * RESET_DONE confirms the subsystem is running. + * + * @retval None + */ +void adc_release_reset(void); + +/** + * @brief Initialise the ADC peripheral for GPIO26 (channel 0). + * + * Configures GPIO26 pad for analog input (disables digital I/O, + * pulls, and pad isolation), sets the IO mux function to NULL, + * powers on the ADC, enables the temperature sensor, and selects + * channel 0 as the default input. + * + * @retval None + */ +void adc_init(void); + +/** + * @brief Perform a single ADC conversion and return millivolts. + * + * Triggers a one-shot conversion on the currently selected channel, + * waits for the result, and scales the 12-bit value against the + * 3.3 V reference. + * + * @retval uint32_t measured voltage in millivolts (0-3300) + */ +uint32_t adc_read_mv(void); + +/** + * @brief Read the on-chip temperature sensor in tenths of degrees Celsius. + * + * Temporarily switches to ADC channel 4 (temperature sensor), + * performs a conversion, applies the RP2350 datasheet formula + * T = 27 - (V - 0.706) / 0.001721 using integer arithmetic, + * and restores the previously active channel. + * + * @retval int32_t die temperature in tenths of degrees (e.g. 270 = 27.0 C) + */ +int32_t adc_read_temp_tenths(void); + +#endif /* __RP2350_ADC_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_coprocessor.h b/drivers/0x06_adc_cbm/Inc/rp2350_coprocessor.h new file mode 100644 index 0000000..6e26fa0 --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_coprocessor.h @@ -0,0 +1,33 @@ +/** + ****************************************************************************** + * @file rp2350_coprocessor.h + * @author Kevin Thomas + * @brief Coprocessor access control driver header for RP2350. + * + * Enables coprocessor access via the CPACR register. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_COPROCESSOR_H +#define __RP2350_COPROCESSOR_H + +#include "rp2350.h" + +/** + * @brief Enable coprocessor access via CPACR with DSB/ISB barriers. + * @retval None + */ +void coprocessor_enable(void); + +#endif /* __RP2350_COPROCESSOR_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_delay.h b/drivers/0x06_adc_cbm/Inc/rp2350_delay.h new file mode 100644 index 0000000..fccb205 --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_delay.h @@ -0,0 +1,34 @@ +/** + ****************************************************************************** + * @file rp2350_delay.h + * @author Kevin Thomas + * @brief Delay driver header for RP2350. + * + * Millisecond busy-wait delay calibrated for a 14.5 MHz clock. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_DELAY_H +#define __RP2350_DELAY_H + +#include "rp2350.h" + +/** + * @brief Delay for the specified number of milliseconds. + * @param ms number of milliseconds to delay + * @retval None + */ +void delay_ms(uint32_t ms); + +#endif /* __RP2350_DELAY_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_reset.h b/drivers/0x06_adc_cbm/Inc/rp2350_reset.h new file mode 100644 index 0000000..4a10831 --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_reset.h @@ -0,0 +1,33 @@ +/** + ****************************************************************************** + * @file rp2350_reset.h + * @author Kevin Thomas + * @brief Reset controller driver header for RP2350. + * + * Provides subsystem reset release for IO_BANK0. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_RESET_H +#define __RP2350_RESET_H + +#include "rp2350.h" + +/** + * @brief Release IO_BANK0 from reset and wait until ready. + * @retval None + */ +void reset_init_subsystem(void); + +#endif /* __RP2350_RESET_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_reset_handler.h b/drivers/0x06_adc_cbm/Inc/rp2350_reset_handler.h new file mode 100644 index 0000000..2565e29 --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_reset_handler.h @@ -0,0 +1,33 @@ +/** + ****************************************************************************** + * @file rp2350_reset_handler.h + * @author Kevin Thomas + * @brief Reset handler header for RP2350. + * + * Entry point after reset. Performs stack initialization, XOSC + * setup, subsystem reset release, UART initialization, + * coprocessor enable, and branches to main(). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_RESET_HANDLER_H +#define __RP2350_RESET_HANDLER_H + +/** + * @brief Reset handler entry point (naked, noreturn). + * @retval None + */ +void Reset_Handler(void) __attribute__((noreturn)); + +#endif /* __RP2350_RESET_HANDLER_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_stack.h b/drivers/0x06_adc_cbm/Inc/rp2350_stack.h new file mode 100644 index 0000000..952d26e --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_stack.h @@ -0,0 +1,34 @@ +/** + ****************************************************************************** + * @file rp2350_stack.h + * @author Kevin Thomas + * @brief Stack pointer initialization header for RP2350. + * + * Sets MSP, PSP, MSPLIM, and PSPLIM from the STACK_TOP and + * STACK_LIMIT values defined in rp2350.h. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_STACK_H +#define __RP2350_STACK_H + +#include "rp2350.h" + +/** + * @brief Initialize MSP, PSP, MSPLIM, and PSPLIM stack pointers. + * @retval None + */ +void stack_init(void); + +#endif /* __RP2350_STACK_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_uart.h b/drivers/0x06_adc_cbm/Inc/rp2350_uart.h new file mode 100644 index 0000000..b99425b --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_uart.h @@ -0,0 +1,73 @@ +/** + ****************************************************************************** + * @file rp2350_uart.h + * @author Kevin Thomas + * @brief UART0 driver header for RP2350. + * + * Bare-metal UART0 driver supporting TX/RX on GPIO 0/1 at + * 115200 baud (14.5 MHz XOSC clock). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_UART_H +#define __RP2350_UART_H + +#include "rp2350.h" + +/** + * @brief Release UART0 from reset and wait until ready. + * @retval None + */ +void uart_release_reset(void); + +/** + * @brief Initialize UART0 pins, baud rate, line control, and enable. + * @retval None + */ +void uart_init(void); + +/** + * @brief Check whether a received byte is waiting in the UART FIFO. + * @retval bool true if at least one byte is available + */ +bool uart_is_readable(void); + +/** + * @brief Read one character from UART0 (blocking). + * @retval char the received character + */ +char uart_getchar(void); + +/** + * @brief Transmit one character over UART0 (blocking). + * @param c character to transmit + * @retval None + */ +void uart_putchar(char c); + +/** + * @brief Transmit a null-terminated string over UART0. + * @param str pointer to the string to send + * @retval None + */ +void uart_puts(const char *str); + +/** + * @brief Convert a lowercase ASCII character to uppercase. + * @param c input character + * @retval char uppercase equivalent or original character + */ +char uart_to_upper(char c); + +#endif /* __RP2350_UART_H */ diff --git a/drivers/0x06_adc_cbm/Inc/rp2350_xosc.h b/drivers/0x06_adc_cbm/Inc/rp2350_xosc.h new file mode 100644 index 0000000..9202a9c --- /dev/null +++ b/drivers/0x06_adc_cbm/Inc/rp2350_xosc.h @@ -0,0 +1,46 @@ +/** + ****************************************************************************** + * @file rp2350_xosc.h + * @author Kevin Thomas + * @brief XOSC driver header for RP2350. + * + * External crystal oscillator initialization and peripheral + * clock enable using the XOSC registers. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __RP2350_XOSC_H +#define __RP2350_XOSC_H + +#include "rp2350.h" + +/** + * @brief Initialize the external crystal oscillator and wait until stable. + * @retval None + */ +void xosc_init(void); + +/** + * @brief Enable the XOSC peripheral clock via CLK_PERI_CTRL. + * @retval None + */ +void xosc_enable_peri_clk(void); + +/** + * @brief Enable the XOSC ADC clock via CLK_ADC_CTRL. + * @retval None + */ +void xosc_enable_adc_clk(void); + +#endif /* __RP2350_XOSC_H */ diff --git a/drivers/0x06_adc_cbm/Makefile b/drivers/0x06_adc_cbm/Makefile new file mode 100644 index 0000000..7930990 --- /dev/null +++ b/drivers/0x06_adc_cbm/Makefile @@ -0,0 +1,79 @@ +# ------------------------------------------------------------------------------ +# @file Makefile +# @author Kevin Thomas +# @brief Build script for RP2350 bare-metal C ADC driver. +# +# Compiles, links, and generates UF2 firmware for the RP2350. +# ------------------------------------------------------------------------------ + +# Toolchain +CC = arm-none-eabi-gcc +OBJCOPY = arm-none-eabi-objcopy +SIZE = arm-none-eabi-size + +# Target +TARGET = adc + +# Directories +SRC_DIR = Src +INC_DIR = Inc +BUILD_DIR = build + +# CPU flags +CPU_FLAGS = -mcpu=cortex-m33 -mthumb + +# Compiler flags +CFLAGS = $(CPU_FLAGS) -Og -g3 -Wall -Wextra \ + -ffunction-sections -fdata-sections \ + -I$(INC_DIR) + +# Linker flags +LDFLAGS = $(CPU_FLAGS) -T linker.ld -nostdlib -Wl,--gc-sections + +# Source files +SRCS = $(SRC_DIR)/vector_table.c \ + $(SRC_DIR)/rp2350_reset_handler.c \ + $(SRC_DIR)/rp2350_stack.c \ + $(SRC_DIR)/rp2350_xosc.c \ + $(SRC_DIR)/rp2350_reset.c \ + $(SRC_DIR)/rp2350_coprocessor.c \ + $(SRC_DIR)/rp2350_uart.c \ + $(SRC_DIR)/rp2350_adc.c \ + $(SRC_DIR)/rp2350_delay.c \ + $(SRC_DIR)/main.c \ + $(SRC_DIR)/image_def.c + +# Object files +OBJS = $(patsubst $(SRC_DIR)/%.c,$(BUILD_DIR)/%.o,$(SRCS)) + +# Rules +.PHONY: all clean flash + +all: $(BUILD_DIR)/$(TARGET).uf2 + @echo "===================================" + @echo "SUCCESS! Created $(TARGET).bin and $(TARGET).uf2" + @echo "===================================" + +$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c | $(BUILD_DIR) + $(CC) $(CFLAGS) -c $< -o $@ + +$(BUILD_DIR)/$(TARGET).elf: $(OBJS) + $(CC) $(LDFLAGS) $(OBJS) -o $@ + $(SIZE) $@ + +$(BUILD_DIR)/$(TARGET).bin: $(BUILD_DIR)/$(TARGET).elf + $(OBJCOPY) -O binary $< $@ + +$(BUILD_DIR)/$(TARGET).uf2: $(BUILD_DIR)/$(TARGET).bin + python3 uf2conv.py -b 0x10000000 -f 0xe48bff59 -o $@ $< + +$(BUILD_DIR): + mkdir -p $(BUILD_DIR) + +clean: + rm -rf $(BUILD_DIR) + +flash: $(BUILD_DIR)/$(TARGET).elf + openocd -f interface/cmsis-dap.cfg -f target/rp2350.cfg \ + -c "adapter speed 5000" \ + -c "program $< verify reset exit" diff --git a/drivers/0x06_adc_cbm/Src/image_def.c b/drivers/0x06_adc_cbm/Src/image_def.c new file mode 100644 index 0000000..9a34198 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/image_def.c @@ -0,0 +1,35 @@ +/** + ****************************************************************************** + * @file image_def.c + * @author Kevin Thomas + * @brief RP2350 IMAGE_DEF block for boot ROM image recognition. + * + * Must appear within the first 4 KB of flash for the boot ROM + * to accept the image. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include + +/** + * @brief IMAGE_DEF block structure placed in flash + */ +__attribute__((section(".embedded_block"), used)) +const uint8_t picobin_block[] = { + 0xD3, 0xDE, 0xFF, 0xFF, + 0x42, 0x01, 0x21, 0x10, + 0xFF, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x79, 0x35, 0x12, 0xAB +}; diff --git a/drivers/0x06_adc_cbm/Src/main.c b/drivers/0x06_adc_cbm/Src/main.c new file mode 100644 index 0000000..b0c0b63 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/main.c @@ -0,0 +1,111 @@ +/** + ****************************************************************************** + * @file main.c + * @author Kevin Thomas + * @brief ADC demonstration: potentiometer voltage and chip temperature. + * + * Demonstrates 12-bit ADC using the bare-metal ADC driver. Reads + * ADC channel 0 (GPIO26) and reports the voltage in millivolts + * alongside the on-chip temperature sensor reading every 500 ms + * over UART. + * + * Wiring: + * GPIO0 -> UART TX (USB-to-UART adapter RX) + * GPIO1 -> UART RX (USB-to-UART adapter TX) + * GPIO26 -> Wiper of a 10 kohm potentiometer + * 3.3V -> One end of the potentiometer + * GND -> Other end of the potentiometer + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_adc.h" +#include "rp2350_uart.h" +#include "rp2350_xosc.h" +#include "rp2350_delay.h" + +#define SAMPLE_DELAY_MS 500 + +/** + * @brief Reverse a character buffer in place. + * @param buf pointer to the buffer + * @param len number of characters to reverse + * @retval None + */ +static void _reverse(char *buf, uint8_t len) +{ + for (uint8_t i = 0; i < len / 2; i++) { + char tmp = buf[i]; + buf[i] = buf[len - 1 - i]; + buf[len - 1 - i] = tmp; + } +} + +/** + * @brief Print an unsigned 32-bit integer as a decimal string over UART. + * @param val value to print + * @retval None + */ +static void _print_uint32(uint32_t val) +{ + char buf[11]; + uint8_t len = 0; + do { buf[len++] = (char)('0' + val % 10); val /= 10; } while (val > 0); + _reverse(buf, len); + buf[len] = '\0'; + uart_puts(buf); +} + +/** + * @brief Print a signed temperature in tenths of degrees as XX.X over UART. + * @param tenths temperature in tenths of degrees Celsius + * @retval None + */ +static void _print_temp(int32_t tenths) +{ + if (tenths < 0) { uart_puts("-"); tenths = -tenths; } + _print_uint32((uint32_t)(tenths / 10)); + char frac[2] = { (char)('0' + tenths % 10), '\0' }; + uart_puts("."); + uart_puts(frac); +} + +/** + * @brief Print ADC voltage and chip temperature readings over UART. + * @retval None + */ +static void _print_readings(void) +{ + uint32_t mv = adc_read_mv(); + int32_t temp = adc_read_temp_tenths(); + uart_puts("ADC0: "); + _print_uint32(mv); + uart_puts(" mV | Chip temp: "); + _print_temp(temp); + uart_puts(" C\r\n"); +} + +/** + * @brief Application entry point for the ADC voltage and temperature demo. + * @retval int does not return + */ +int main(void) +{ + xosc_enable_adc_clk(); + adc_release_reset(); + adc_init(); + while (1) { + _print_readings(); + delay_ms(SAMPLE_DELAY_MS); + } +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_adc.c b/drivers/0x06_adc_cbm/Src/rp2350_adc.c new file mode 100644 index 0000000..883a764 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_adc.c @@ -0,0 +1,159 @@ +/** + ****************************************************************************** + * @file rp2350_adc.c + * @author Kevin Thomas + * @brief RP2350 12-bit ADC driver implementation. + * + * Bare-metal driver for the RP2350 ADC peripheral. Reads analog + * voltage on GPIO26 (channel 0) and the on-chip temperature sensor + * (channel 4). All register accesses verified against the RP2350 + * datasheet (RP-008373-DS-2). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_adc.h" + +static uint8_t active_channel = 0; + +/** + * @brief Configure the GPIO26 pad for analog input. + * + * Sets drive strength to 4 mA and clears pad isolation, output + * disable, input enable, pull-up, pull-down, and schmitt trigger + * bits so the pad is fully analog. + * + * @retval None + */ +static void _adc_config_pad(void) +{ + PADS_BANK0->GPIO[ADC_PIN] = PADS_BANK0_DRIVE_4MA; +} + +/** + * @brief Set GPIO26 IO mux function to NULL (disconnected). + * + * Writes FUNCSEL = 0x1F to the IO_BANK0 control register for + * GPIO26, ensuring no digital peripheral drives the pin. + * + * @retval None + */ +static void _adc_config_gpio(void) +{ + IO_BANK0->GPIO[ADC_PIN].CTRL = IO_BANK0_CTRL_FUNCSEL_NULL; +} + +/** + * @brief Select an ADC input channel. + * + * Writes the channel number into the AINSEL field of the CS + * register while preserving all other bits. + * + * @param ch channel number (0-4) + * @retval None + */ +static void _adc_select_input(uint8_t ch) +{ + uint32_t cs = ADC->CS; + cs &= ~ADC_CS_AINSEL_MASK; + cs |= ((uint32_t)ch << ADC_CS_AINSEL_SHIFT); + ADC->CS = cs; +} + +/** + * @brief Trigger a single conversion and return the raw 12-bit result. + * + * Sets START_ONCE in the CS register, spins until READY is + * asserted, then reads the 12-bit value from the RESULT register. + * + * @retval uint16_t raw ADC conversion result (0-4095) + */ +static uint16_t _adc_read_raw(void) +{ + uint32_t timeout = ADC_READY_TIMEOUT; + ADC->CS |= (1U << ADC_CS_START_ONCE_SHIFT); + while (!(ADC->CS & (1U << ADC_CS_READY_SHIFT)) && timeout > 0U) { + timeout--; + } + if (timeout == 0U) { + return 0U; + } + return (uint16_t)(ADC->RESULT & 0xFFFU); +} + +/** + * @brief Convert a raw 12-bit ADC value to millivolts. + * + * Scales the raw value linearly against the 3.3 V (3300 mV) + * full-scale reference. + * + * @param raw 12-bit ADC conversion result (0-4095) + * @retval uint32_t equivalent voltage in millivolts (0-3300) + */ +static uint32_t _raw_to_mv(uint16_t raw) +{ + return (uint32_t)raw * ADC_VREF_MV / ADC_FULL_SCALE; +} + +/** + * @brief Convert a raw temperature-sensor ADC value to tenths of degrees. + * + * Applies the RP2350 datasheet formula T = 27 - (V - 0.706) / 0.001721 + * using integer arithmetic with millivolt-times-ten precision. + * V is computed as raw * 33000 / 4095 (voltage in 0.1 mV units). + * + * @param raw 12-bit ADC result from the internal temperature sensor + * @retval int32_t die temperature in tenths of degrees Celsius + */ +static int32_t _raw_to_temp_tenths(uint16_t raw) +{ + int32_t v_mv10 = (int32_t)((uint32_t)raw * 33000U / ADC_FULL_SCALE); + return 270 - (v_mv10 - 7060) * 1000 / 1721; +} + +void adc_release_reset(void) +{ + RESETS->RESET |= (1U << RESETS_RESET_ADC_SHIFT); + uint32_t timeout = ADC_READY_TIMEOUT; + RESETS->RESET &= ~(1U << RESETS_RESET_ADC_SHIFT); + while (!(RESETS->RESET_DONE & (1U << RESETS_RESET_ADC_SHIFT)) && timeout > 0U) { + timeout--; + } +} + +void adc_init(void) +{ + _adc_config_pad(); + _adc_config_gpio(); + ADC->CS = (1U << ADC_CS_EN_SHIFT); + uint32_t timeout = ADC_READY_TIMEOUT; + while (!(ADC->CS & (1U << ADC_CS_READY_SHIFT)) && timeout > 0U) { + timeout--; + } + ADC->CS |= (1U << ADC_CS_TS_EN_SHIFT); + active_channel = ADC_CHANNEL; + _adc_select_input(active_channel); +} + +uint32_t adc_read_mv(void) +{ + return _raw_to_mv(_adc_read_raw()); +} + +int32_t adc_read_temp_tenths(void) +{ + _adc_select_input(ADC_TEMP_CHANNEL); + int32_t result = _raw_to_temp_tenths(_adc_read_raw()); + _adc_select_input(active_channel); + return result; +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_coprocessor.c b/drivers/0x06_adc_cbm/Src/rp2350_coprocessor.c new file mode 100644 index 0000000..b637b36 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_coprocessor.c @@ -0,0 +1,34 @@ +/** + ****************************************************************************** + * @file rp2350_coprocessor.c + * @author Kevin Thomas + * @brief Coprocessor access control driver implementation for RP2350. + * + * Grants access to coprocessors 0 and 1 by setting the + * corresponding bits in CPACR with DSB/ISB barriers. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_coprocessor.h" + +void coprocessor_enable(void) +{ + uint32_t value; + value = *CPACR; + value |= (1U << CPACR_CP1_SHIFT); + value |= (1U << CPACR_CP0_SHIFT); + *CPACR = value; + __asm__ volatile ("dsb"); + __asm__ volatile ("isb"); +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_delay.c b/drivers/0x06_adc_cbm/Src/rp2350_delay.c new file mode 100644 index 0000000..579c211 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_delay.c @@ -0,0 +1,39 @@ +/** + ****************************************************************************** + * @file rp2350_delay.c + * @author Kevin Thomas + * @brief Delay driver implementation for RP2350. + * + * Busy-wait millisecond delay calibrated for a 14.5 MHz clock + * (3600 loop iterations per millisecond). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_delay.h" + +void delay_ms(uint32_t ms) +{ + if (ms == 0) + return; + __asm__ volatile ( + "mov r4, #3600\n\t" + "mul r5, %0, r4\n\t" + "1:\n\t" + "subs r5, #1\n\t" + "bne 1b\n\t" + : + : "r" (ms) + : "r4", "r5", "cc" + ); +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_reset.c b/drivers/0x06_adc_cbm/Src/rp2350_reset.c new file mode 100644 index 0000000..b0e18e8 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_reset.c @@ -0,0 +1,33 @@ +/** + ****************************************************************************** + * @file rp2350_reset.c + * @author Kevin Thomas + * @brief Reset controller driver implementation for RP2350. + * + * Releases IO_BANK0 from reset and waits until the subsystem + * is ready. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_reset.h" + +void reset_init_subsystem(void) +{ + uint32_t value; + value = RESETS->RESET; + value &= ~(1U << RESETS_RESET_IO_BANK0_SHIFT); + RESETS->RESET = value; + while ((RESETS->RESET_DONE & (1U << RESETS_RESET_IO_BANK0_SHIFT)) == 0) { + } +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_reset_handler.c b/drivers/0x06_adc_cbm/Src/rp2350_reset_handler.c new file mode 100644 index 0000000..af4c51f --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_reset_handler.c @@ -0,0 +1,46 @@ +/** + ****************************************************************************** + * @file rp2350_reset_handler.c + * @author Kevin Thomas + * @brief Reset handler implementation for RP2350. + * + * Entry point after power-on or system reset. Initializes the + * stack, XOSC, subsystem resets, UART, ADC, coprocessor, + * then branches to main(). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_reset_handler.h" +#include "rp2350_stack.h" +#include "rp2350_xosc.h" +#include "rp2350_reset.h" +#include "rp2350_uart.h" +#include "rp2350_adc.h" +#include "rp2350_coprocessor.h" + +extern int main(void); + +void __attribute__((naked, noreturn)) Reset_Handler(void) +{ + __asm__ volatile ( + "bl stack_init\n\t" + "bl xosc_init\n\t" + "bl xosc_enable_peri_clk\n\t" + "bl reset_init_subsystem\n\t" + "bl uart_release_reset\n\t" + "bl uart_init\n\t" + "bl coprocessor_enable\n\t" + "b main\n\t" + ); +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_stack.c b/drivers/0x06_adc_cbm/Src/rp2350_stack.c new file mode 100644 index 0000000..9c328dc --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_stack.c @@ -0,0 +1,38 @@ +/** + ****************************************************************************** + * @file rp2350_stack.c + * @author Kevin Thomas + * @brief Stack pointer initialization for RP2350. + * + * Sets MSP, PSP, MSPLIM, and PSPLIM using inline assembly. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_stack.h" + +void stack_init(void) +{ + __asm__ volatile ( + "ldr r0, =%0\n\t" + "msr PSP, r0\n\t" + "ldr r0, =%1\n\t" + "msr MSPLIM, r0\n\t" + "msr PSPLIM, r0\n\t" + "ldr r0, =%0\n\t" + "msr MSP, r0\n\t" + : + : "i" (STACK_TOP), "i" (STACK_LIMIT) + : "r0" + ); +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_uart.c b/drivers/0x06_adc_cbm/Src/rp2350_uart.c new file mode 100644 index 0000000..281ad52 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_uart.c @@ -0,0 +1,126 @@ +/** + ****************************************************************************** + * @file rp2350_uart.c + * @author Kevin Thomas + * @brief UART0 driver implementation for RP2350. + * + * Configures UART0 on GPIO 0 (TX) and GPIO 1 (RX) at 115200 + * baud using the 14.5 MHz XOSC clock. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_uart.h" + +#define UART_BASE ((volatile uint32_t *) UART0_BASE) + +/** + * @brief Clear the UART0 reset bit in the reset controller. + * @retval None + */ +static void _uart_clear_reset_bit(void) +{ + uint32_t value; + value = RESETS->RESET; + value &= ~(1U << RESETS_RESET_UART0_SHIFT); + RESETS->RESET = value; +} + +/** + * @brief Wait until the UART0 block is out of reset. + * @retval None + */ +static void _uart_wait_reset_done(void) +{ + while ((RESETS->RESET_DONE & (1U << RESETS_RESET_UART0_SHIFT)) == 0) { + } +} + +/** + * @brief Configure GPIO pins 0 (TX) and 1 (RX) for UART function. + * @retval None + */ +static void _uart_configure_pins(void) +{ + IO_BANK0->GPIO[0].CTRL = IO_BANK0_CTRL_FUNCSEL_UART; + IO_BANK0->GPIO[1].CTRL = IO_BANK0_CTRL_FUNCSEL_UART; + PADS_BANK0->GPIO[0] = 0x04; + PADS_BANK0->GPIO[1] = 0x40; +} + +/** + * @brief Set UART0 baud rate divisors for 115200 at 14.5 MHz. + * @retval None + */ +static void _uart_set_baud(void) +{ + UART_BASE[UART_CR_OFFSET] = 0; + UART_BASE[UART_IBRD_OFFSET] = 6; + UART_BASE[UART_FBRD_OFFSET] = 33; +} + +/** + * @brief Configure line control and enable UART0. + * @retval None + */ +static void _uart_enable(void) +{ + UART_BASE[UART_LCR_H_OFFSET] = UART_LCR_H_8N1_FIFO; + UART_BASE[UART_CR_OFFSET] = UART_CR_ENABLE; +} + +void uart_release_reset(void) +{ + _uart_clear_reset_bit(); + _uart_wait_reset_done(); +} + +void uart_init(void) +{ + _uart_configure_pins(); + _uart_set_baud(); + _uart_enable(); +} + +bool uart_is_readable(void) +{ + return (UART_BASE[UART_FR_OFFSET] & UART_FR_RXFE_MASK) == 0; +} + +char uart_getchar(void) +{ + while (UART_BASE[UART_FR_OFFSET] & UART_FR_RXFE_MASK) { + } + return (char)(UART_BASE[UART_DR_OFFSET] & 0xFF); +} + +void uart_putchar(char c) +{ + while (UART_BASE[UART_FR_OFFSET] & UART_FR_TXFF_MASK) { + } + UART_BASE[UART_DR_OFFSET] = (uint32_t)c; +} + +void uart_puts(const char *str) +{ + while (*str) { + uart_putchar(*str++); + } +} + +char uart_to_upper(char c) +{ + if (c >= 'a' && c <= 'z') + return (char)(c - 32); + return c; +} diff --git a/drivers/0x06_adc_cbm/Src/rp2350_xosc.c b/drivers/0x06_adc_cbm/Src/rp2350_xosc.c new file mode 100644 index 0000000..92eba2f --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/rp2350_xosc.c @@ -0,0 +1,51 @@ +/** + ****************************************************************************** + * @file rp2350_xosc.c + * @author Kevin Thomas + * @brief XOSC driver implementation for RP2350. + * + * Configures the external crystal oscillator and enables the + * peripheral clock sourced from XOSC. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "rp2350_xosc.h" + +void xosc_init(void) +{ + XOSC->STARTUP = 0x00C4U; + XOSC->CTRL = 0x00FABAA0U; + while ((XOSC->STATUS & (1U << XOSC_STATUS_STABLE_SHIFT)) == 0) { + } +} + +void xosc_enable_peri_clk(void) +{ + uint32_t value; + value = CLOCKS->CLK_PERI_CTRL; + value &= ~CLK_PERI_CTRL_AUXSRC_MASK; + value |= (1U << CLK_PERI_CTRL_ENABLE_SHIFT); + value |= (CLK_PERI_CTRL_AUXSRC_XOSC << CLK_PERI_CTRL_AUXSRC_SHIFT); + CLOCKS->CLK_PERI_CTRL = value; +} + +void xosc_enable_adc_clk(void) +{ + uint32_t value; + value = CLOCKS->CLK_ADC_CTRL; + value &= ~CLK_ADC_CTRL_AUXSRC_MASK; + value |= (1U << CLK_ADC_CTRL_ENABLE_SHIFT); + value |= (CLK_ADC_CTRL_AUXSRC_XOSC << CLK_ADC_CTRL_AUXSRC_SHIFT); + CLOCKS->CLK_ADC_CTRL = value; +} diff --git a/drivers/0x06_adc_cbm/Src/vector_table.c b/drivers/0x06_adc_cbm/Src/vector_table.c new file mode 100644 index 0000000..5d234c5 --- /dev/null +++ b/drivers/0x06_adc_cbm/Src/vector_table.c @@ -0,0 +1,38 @@ +/** + ****************************************************************************** + * @file vector_table.c + * @author Kevin Thomas + * @brief Vector table with initial stack pointer and reset handler. + * + * Placed in the .vectors section at the start of flash. + * The Thumb bit (bit 0 = 1) is automatically set by the + * linker for function pointers in Thumb mode. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include + +extern uint32_t _stack_top; +extern void Reset_Handler(void); + +typedef void (*vector_func_t)(void); + +/** + * @brief Vector table placed in .vectors section + */ +__attribute__((section(".vectors"), used)) +const void *_vectors[2] = { + &_stack_top, + Reset_Handler +}; diff --git a/drivers/0x06_adc_cbm/linker.ld b/drivers/0x06_adc_cbm/linker.ld new file mode 100644 index 0000000..09ea7a6 --- /dev/null +++ b/drivers/0x06_adc_cbm/linker.ld @@ -0,0 +1,114 @@ +/** + ****************************************************************************** + * @file linker.ld + * @author Kevin Thomas + * @brief Minimal linker script for bare-metal RP2350 development. + * + * Defines FLASH (XIP 32 MB) and RAM (520 kB SRAM) regions. + * The vector table is placed at the start of flash (0x10000000). + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 Kevin Thomas. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** + * Entry point. + */ +ENTRY(Reset_Handler) + +/** + * Define memory regions. + */ +__XIP_BASE = 0x10000000; +__XIP_SIZE = 32M; + +__SRAM_BASE = 0x20000000; +__SRAM_SIZE = 520K; +__STACK_SIZE = 32K; + +/** + * Memory layout. + */ +MEMORY +{ + RAM (rwx) : ORIGIN = __SRAM_BASE, LENGTH = __SRAM_SIZE + FLASH (rx) : ORIGIN = __XIP_BASE, LENGTH = __XIP_SIZE +} + +/** + * Program headers. + */ +PHDRS +{ + text PT_LOAD FLAGS(5); +} + +/** + * Section placement. + */ +SECTIONS +{ + . = ORIGIN(FLASH); + + /** + * Vector table MUST be first at 0x10000000. + */ + .vectors : + { + KEEP(*(.vectors)) + } > FLASH :text + + /** + * Verify vector table placement. + */ + ASSERT((ADDR(.vectors) == ORIGIN(FLASH)), + "Vector table must be at start of flash (0x10000000)") + + /** + * Text and read-only data. + */ + .text : + { + . = ALIGN(4); + *(.text*) + *(.rodata*) + KEEP(*(.init)) + KEEP(*(.fini)) + KEEP(*(.ARM.attributes)) + } > FLASH :text + + /** + * IMAGE_DEF block at end of code. + */ + .embedded_block : + { + KEEP(*(.embedded_block)) + } > FLASH :text + + /** + * Non-secure stack symbols. + */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - __STACK_SIZE; + __stack = __StackTop; + _stack_top = __StackTop; + + /** + * Stack section (no load). + */ + .stack (NOLOAD) : { . = ALIGN(8); } > RAM + + /** + * Provide vector table symbol to startup code. + */ + PROVIDE(__Vectors = ADDR(.vectors)); +} diff --git a/drivers/0x06_adc_cbm/uf2conv.py b/drivers/0x06_adc_cbm/uf2conv.py new file mode 100644 index 0000000..529dd96 --- /dev/null +++ b/drivers/0x06_adc_cbm/uf2conv.py @@ -0,0 +1,438 @@ +#!/usr/bin/env python3 +import sys +import struct +import subprocess +import re +import os +import os.path +import argparse +import json +from time import sleep + + +UF2_MAGIC_START0 = 0x0A324655 # "UF2\n" +UF2_MAGIC_START1 = 0x9E5D5157 # Randomly selected +UF2_MAGIC_END = 0x0AB16F30 # Ditto + +INFO_FILE = "/INFO_UF2.TXT" + +appstartaddr = 0x2000 +familyid = 0x0 + + +def is_uf2(buf): + w = struct.unpack(" 476: + assert False, "Invalid UF2 data size at " + ptr + newaddr = hd[3] + if (hd[2] & 0x2000) and (currfamilyid == None): + currfamilyid = hd[7] + if curraddr == None or ((hd[2] & 0x2000) and hd[7] != currfamilyid): + currfamilyid = hd[7] + curraddr = newaddr + if familyid == 0x0 or familyid == hd[7]: + appstartaddr = newaddr + padding = newaddr - curraddr + if padding < 0: + assert False, "Block out of order at " + ptr + if padding > 10 * 1024 * 1024: + assert False, "More than 10M of padding needed at " + ptr + if padding % 4 != 0: + assert False, "Non-word padding size at " + ptr + while padding > 0: + padding -= 4 + outp.append(b"\x00\x00\x00\x00") + if familyid == 0x0 or ((hd[2] & 0x2000) and familyid == hd[7]): + outp.append(block[32 : 32 + datalen]) + curraddr = newaddr + datalen + if hd[2] & 0x2000: + if hd[7] in families_found.keys(): + if families_found[hd[7]] > newaddr: + families_found[hd[7]] = newaddr + else: + families_found[hd[7]] = newaddr + if prev_flag == None: + prev_flag = hd[2] + if prev_flag != hd[2]: + all_flags_same = False + if blockno == (numblocks - 1): + print("--- UF2 File Header Info ---") + families = load_families() + for family_hex in families_found.keys(): + family_short_name = "" + for name, value in families.items(): + if value == family_hex: + family_short_name = name + print( + "Family ID is {:s}, hex value is 0x{:08x}".format( + family_short_name, family_hex + ) + ) + print("Target Address is 0x{:08x}".format(families_found[family_hex])) + if all_flags_same: + print("All block flag values consistent, 0x{:04x}".format(hd[2])) + else: + print("Flags were not all the same") + print("----------------------------") + if len(families_found) > 1 and familyid == 0x0: + outp = [] + appstartaddr = 0x0 + return b"".join(outp) + + +def convert_to_carray(file_content): + outp = "const unsigned long bindata_len = %d;\n" % len(file_content) + outp += "const unsigned char bindata[] __attribute__((aligned(16))) = {" + for i in range(len(file_content)): + if i % 16 == 0: + outp += "\n" + outp += "0x%02x, " % file_content[i] + outp += "\n};\n" + return bytes(outp, "utf-8") + + +def convert_to_uf2(file_content): + global familyid + datapadding = b"" + while len(datapadding) < 512 - 256 - 32 - 4: + datapadding += b"\x00\x00\x00\x00" + numblocks = (len(file_content) + 255) // 256 + outp = [] + for blockno in range(numblocks): + ptr = 256 * blockno + chunk = file_content[ptr : ptr + 256] + flags = 0x0 + if familyid: + flags |= 0x2000 + hd = struct.pack( + b"