Add 0x01_uart_rust driver and update README

drivers/0x01_uart_rust/src/main.rs

@@ -0,0 +1,167 @@
+//! @file main.rs
+//! @brief UART demonstration: echo received characters back in uppercase
+//! @author Kevin Thomas
+//! @date 2025
+//!
+//! MIT License
+//!
+//! Copyright (c) 2025 Kevin Thomas
+//!
+//! Permission is hereby granted, free of charge, to any person obtaining a copy
+//! of this software and associated documentation files (the "Software"), to deal
+//! in the Software without restriction, including without limitation the rights
+//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+//! copies of the Software, and to permit persons to whom the Software is
+//! furnished to do so, subject to the following conditions:
+//!
+//! The above copyright notice and this permission notice shall be included in
+//! all copies or substantial portions of the Software.
+//!
+//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+//! SOFTWARE.
+//!
+//! -----------------------------------------------------------------------------
+//!
+//! Demonstrates hardware UART0 using the uart driver (uart.rs).
+//! Characters typed into a terminal via a USB-to-UART adapter are echoed
+//! back in uppercase, illustrating full-duplex raw UART operation without
+//! going through the stdio layer.
+//!
+//! Wiring:
+//!   GPIO0 (TX) -> USB-to-UART adapter RX
+//!   GPIO1 (RX) -> USB-to-UART adapter TX
+//!   GND        -> USB-to-UART adapter GND
+
+#![no_std]
+#![no_main]
+
+mod uart;
+
+use defmt_rtt as _;
+#[cfg(target_arch = "riscv32")]
+use panic_halt as _;
+#[cfg(target_arch = "arm")]
+use panic_probe as _;
+
+use hal::entry;
+
+#[cfg(rp2350)]
+use rp235x_hal as hal;
+
+#[cfg(rp2040)]
+use rp2040_hal as hal;
+
+#[unsafe(link_section = ".boot2")]
+#[used]
+#[cfg(rp2040)]
+pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_W25Q080;
+
+#[unsafe(link_section = ".start_block")]
+#[used]
+#[cfg(rp2350)]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
+const XTAL_FREQ_HZ: u32 = 12_000_000u32;
+
+const UART_BAUD: u32 = 115_200;
+
+/// Initialise system clocks and PLLs from the external 12 MHz crystal.
+///
+/// # Arguments
+///
+/// * `xosc` - XOSC peripheral singleton.
+/// * `clocks` - CLOCKS peripheral singleton.
+/// * `pll_sys` - PLL_SYS peripheral singleton.
+/// * `pll_usb` - PLL_USB peripheral singleton.
+/// * `resets` - Mutable reference to the RESETS peripheral.
+/// * `watchdog` - Mutable reference to the watchdog timer.
+///
+/// # Returns
+///
+/// Configured clocks manager.
+///
+/// # Panics
+///
+/// Panics if clock initialisation fails.
+fn init_clocks(
+    xosc: hal::pac::XOSC,
+    clocks: hal::pac::CLOCKS,
+    pll_sys: hal::pac::PLL_SYS,
+    pll_usb: hal::pac::PLL_USB,
+    resets: &mut hal::pac::RESETS,
+    watchdog: &mut hal::Watchdog,
+) -> hal::clocks::ClocksManager {
+    hal::clocks::init_clocks_and_plls(
+        XTAL_FREQ_HZ, xosc, clocks, pll_sys, pll_usb, resets, watchdog,
+    )
+    .unwrap()
+}
+
+/// Unlock the GPIO bank and return the pin set.
+///
+/// # Arguments
+///
+/// * `io_bank0` - IO_BANK0 peripheral singleton.
+/// * `pads_bank0` - PADS_BANK0 peripheral singleton.
+/// * `sio` - SIO peripheral singleton.
+/// * `resets` - Mutable reference to the RESETS peripheral.
+///
+/// # Returns
+///
+/// GPIO pin set for the entire bank.
+fn init_pins(
+    io_bank0: hal::pac::IO_BANK0,
+    pads_bank0: hal::pac::PADS_BANK0,
+    sio: hal::pac::SIO,
+    resets: &mut hal::pac::RESETS,
+) -> hal::gpio::Pins {
+    let sio = hal::Sio::new(sio);
+    hal::gpio::Pins::new(io_bank0, pads_bank0, sio.gpio_bank0, resets)
+}
+
+/// Application entry point for the UART uppercase echo demo.
+///
+/// Initializes UART0 and enters an infinite loop that reads incoming
+/// characters, converts them to uppercase, and echoes them back.
+///
+/// # Returns
+///
+/// Does not return.
+#[entry]
+fn main() -> ! {
+    let mut pac = hal::pac::Peripherals::take().unwrap();
+    let mut watchdog = hal::Watchdog::new(pac.WATCHDOG);
+    let clocks = init_clocks(
+        pac.XOSC, pac.CLOCKS, pac.PLL_SYS, pac.PLL_USB, &mut pac.RESETS, &mut watchdog,
+    );
+    let pins = init_pins(pac.IO_BANK0, pac.PADS_BANK0, pac.SIO, &mut pac.RESETS);
+    let mut drv = uart::UartDriver::init(
+        pac.UART0, pins.gpio0, pins.gpio1, UART_BAUD, &mut pac.RESETS, &clocks,
+    );
+    drv.puts(b"UART driver ready (115200 8N1)\r\n");
+    drv.puts(b"Type characters to echo them back in UPPERCASE:\r\n");
+    loop {
+        if drv.is_readable() {
+            let c = drv.getchar();
+            let upper = uart::UartDriver::to_upper(c);
+            drv.putchar(upper);
+        }
+    }
+}
+
+#[unsafe(link_section = ".bi_entries")]
+#[used]
+pub static PICOTOOL_ENTRIES: [hal::binary_info::EntryAddr; 5] = [
+    hal::binary_info::rp_cargo_bin_name!(),
+    hal::binary_info::rp_cargo_version!(),
+    hal::binary_info::rp_program_description!(c"UART Uppercase Echo"),
+    hal::binary_info::rp_cargo_homepage_url!(),
+    hal::binary_info::rp_program_build_attribute!(),
+];
+
+// End of file