Initial commit

This commit is contained in:
Kevin Thomas
2026-07-06 14:32:12 -04:00
commit f62db776e1
615 changed files with 72344 additions and 0 deletions
+32
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[build]
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[target.thumbv8m.main-none-eabihf]
rustflags = [
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runner = "${PICOTOOL_PATH} load -u -v -x -t elf"
[target.riscv32imac-unknown-none-elf]
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runner = "${PICOTOOL_PATH} load -u -v -x -t elf"
[env]
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+1
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rp2350
+8
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+41
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+8
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+124
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"embedded-hal 1.0.0",
"embedded-hal-async",
"embedded-hal-nb",
"embedded-io",
"frunk",
"fugit",
"itertools 0.10.5",
"nb 1.1.0",
"paste",
"pio",
"rand_core",
"rp-binary-info",
"rp-hal-common",
"rp2040-hal-macros",
"rp2040-pac",
"usb-device",
"vcell",
"void",
]
[[package]]
name = "rp2040-hal-macros"
version = "0.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "86479063e497efe1ae81995ef9071f54fd1c7427e04d6c5b84cde545ff672a5e"
dependencies = [
"cortex-m-rt",
"proc-macro2",
"quote",
"syn 1.0.109",
]
[[package]]
name = "rp2040-pac"
version = "0.6.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "83cbcd3f7a0ca7bbe61dc4eb7e202842bee4e27b769a7bf3a4a72fa399d6e404"
dependencies = [
"cortex-m",
"cortex-m-rt",
"critical-section",
"vcell",
]
[[package]]
name = "rp235x-hal"
version = "0.3.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e2939c82776b0b4ae110168b4298b5adf831e6cff249b057bf2a2187453b959c"
dependencies = [
"bitfield 0.14.0",
"cortex-m",
"cortex-m-rt",
"critical-section",
"embedded-dma",
"embedded-hal 0.2.7",
"embedded-hal 1.0.0",
"embedded-hal-async",
"embedded-hal-nb",
"embedded-io",
"frunk",
"fugit",
"gcd",
"itertools 0.13.0",
"nb 1.1.0",
"paste",
"pio",
"rand_core",
"riscv",
"riscv-rt",
"rp-binary-info",
"rp-hal-common",
"rp235x-hal-macros",
"rp235x-pac",
"sha2-const-stable",
"usb-device",
"vcell",
"void",
]
[[package]]
name = "rp235x-hal-macros"
version = "0.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "74edd7a5979e9763bbb98e9746e711bac7464ee3397af7288e6c288ff0d3c764"
dependencies = [
"proc-macro2",
"quote",
"syn 2.0.117",
]
[[package]]
name = "rp235x-pac"
version = "0.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "5ffcb6931deee4242886b5a1df62db5e2555b0eb6ae1e8be101f3ea3e58e65c6"
dependencies = [
"cortex-m",
"cortex-m-rt",
"critical-section",
"vcell",
]
[[package]]
name = "rustc_version"
version = "0.2.3"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "138e3e0acb6c9fb258b19b67cb8abd63c00679d2851805ea151465464fe9030a"
dependencies = [
"semver",
]
[[package]]
name = "semver"
version = "0.9.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1d7eb9ef2c18661902cc47e535f9bc51b78acd254da71d375c2f6720d9a40403"
dependencies = [
"semver-parser",
]
[[package]]
name = "semver-parser"
version = "0.7.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
[[package]]
name = "sha2-const-stable"
version = "0.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "5f179d4e11094a893b82fff208f74d448a7512f99f5a0acbd5c679b705f83ed9"
[[package]]
name = "stable_deref_trait"
version = "1.2.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "6ce2be8dc25455e1f91df71bfa12ad37d7af1092ae736f3a6cd0e37bc7810596"
[[package]]
name = "syn"
version = "1.0.109"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237"
dependencies = [
"proc-macro2",
"quote",
"unicode-ident",
]
[[package]]
name = "syn"
version = "2.0.117"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e665b8803e7b1d2a727f4023456bbbbe74da67099c585258af0ad9c5013b9b99"
dependencies = [
"proc-macro2",
"quote",
"unicode-ident",
]
[[package]]
name = "thiserror"
version = "2.0.18"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "4288b5bcbc7920c07a1149a35cf9590a2aa808e0bc1eafaade0b80947865fbc4"
dependencies = [
"thiserror-impl",
]
[[package]]
name = "thiserror-impl"
version = "2.0.18"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "ebc4ee7f67670e9b64d05fa4253e753e016c6c95ff35b89b7941d6b856dec1d5"
dependencies = [
"proc-macro2",
"quote",
"syn 2.0.117",
]
[[package]]
name = "unicode-ident"
version = "1.0.24"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e6e4313cd5fcd3dad5cafa179702e2b244f760991f45397d14d4ebf38247da75"
[[package]]
name = "usb-device"
version = "0.3.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "98816b1accafbb09085168b90f27e93d790b4bfa19d883466b5e53315b5f06a6"
dependencies = [
"heapless",
"portable-atomic",
]
[[package]]
name = "vcell"
version = "0.1.3"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002"
[[package]]
name = "void"
version = "1.0.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
[[package]]
name = "volatile-register"
version = "0.2.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "de437e2a6208b014ab52972a27e59b33fa2920d3e00fe05026167a1c509d19cc"
dependencies = [
"vcell",
]
+79
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@@ -0,0 +1,79 @@
[package]
edition = "2024"
name = "ir"
version = "0.1.0"
license = "MIT or Apache-2.0"
[lib]
name = "ir_lib"
path = "src/lib.rs"
[[bin]]
name = "ir"
path = "src/main.rs"
[dependencies]
cortex-m = "0.7"
cortex-m-rt = "0.7"
fugit = "0.3"
defmt = "1"
defmt-rtt = "1"
[target.'cfg( target_arch = "arm" )'.dependencies]
panic-probe = { version = "1", features = ["print-defmt"] }
[target.'cfg( target_arch = "riscv32" )'.dependencies]
panic-halt = { version = "1.0.0" }
[target.thumbv6m-none-eabi.dependencies]
rp2040-boot2 = "0.3"
rp2040-hal = { version = "0.11", features = ["rt", "critical-section-impl"] }
[target.riscv32imac-unknown-none-elf.dependencies]
rp235x-hal = { version = "0.3", features = ["rt", "critical-section-impl"] }
[target."thumbv8m.main-none-eabihf".dependencies]
rp235x-hal = { version = "0.3", features = ["rt", "critical-section-impl"] }
# cargo build/run
[profile.dev]
debug = 2
debug-assertions = true
opt-level = 2
overflow-checks = true
# cargo build/run --release
[profile.release]
debug = 2
debug-assertions = false
lto = "fat"
opt-level = 2
overflow-checks = false
# do not optimize proc-macro crates = faster builds from scratch
[profile.dev.build-override]
debug = false
debug-assertions = false
overflow-checks = false
opt-level = 0
[profile.release.build-override]
debug = false
debug-assertions = false
overflow-checks = false
opt-level = 0
# cargo test
[profile.test]
debug = 2
debug-assertions = true
opt-level = 2
overflow-checks = true
# cargo test --release
[profile.bench]
debug = 2
debug-assertions = false
lto = "fat"
opt-level = 3
+113
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@@ -0,0 +1,113 @@
# 0x0a IR Rust Driver
This repository contains a Bare-Metal Rust driver for an **IR (Infrared) Receiver** decoding the **NEC Protocol** on the **RP2350** (and RP2040) microcontrollers, implemented strictly using a GPIO pin and a hardware timer to measure pulse widths.
It includes:
- A demo (`src/main.rs`) that waits for IR signals and decodes/prints the received command via UART.
- A reusable library module (`src/ir.rs`) providing a hardware-agnostic `ir_lib` containing the timing thresholds, bit accumulation logic, frame validation, and string formatting routines.
- Board initialization logic (`src/board.rs`).
## 🚀 Getting Started from Scratch
If you're starting with a fresh machine, follow these exact steps to install the toolchain, build the code, and flash it to your microcontroller.
### 1. Install Rust
First, install `rustup` (the Rust toolchain installer) if you haven't already:
```bash
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
```
*Note: Restart your terminal or run `source $HOME/.cargo/env` after this finishes.*
Ensure your Rust compiler is up to date:
```bash
rustup update
```
### 2. Install the Target Architecture
This project is configured for the **RP2350** (ARM Cortex-M33). We need to install the cross-compilation target for it:
```bash
rustup target add thumbv8m.main-none-eabihf
```
*(If you were targeting the RP2040, you would use `thumbv6m-none-eabi` instead).*
### 3. Install Build Tools
You will need a few extra tools to help link and format the firmware for the RP-series chips.
Install `flip-link` (adds zero-cost stack overflow protection):
```bash
cargo install flip-link
```
Install `picotool` (used by `cargo run` to flash the chip):
- **macOS:** `brew install picotool`
- **Linux/Windows:** Follow the official Raspberry Pi documentation to install `picotool` or build it from source.
### 4. Building the Code
To compile the code for the microcontroller, simply run:
```bash
cargo build
```
To build a highly optimized release version (smaller and faster):
```bash
cargo build --release
```
### 5. Flashing to the Microcontroller
This project is pre-configured in `.cargo/config.toml` to use `picotool` as the custom runner.
To flash the code:
1. Hold down the **BOOTSEL** button on your RP2350 board.
2. Plug it into your computer via USB (or press the RUN/RESET button while holding BOOTSEL).
3. Run the following command:
```bash
cargo run --release
```
*`cargo` will compile the code and automatically use `picotool` to upload the `.elf` file directly to your board and start executing it!*
### 6. Testing on the Host
Because the NEC protocol logic (timing constants, bit shifting, checksum validation, and string formatting) is separated into a reusable math library without touching hardware registers, you can run the unit tests natively on your computer!
However, because this project sets a default bare-metal target (`thumbv8m.main-none-eabihf`) in `.cargo/config.toml`, running a plain `cargo test` will fail because the standard library doesn't exist on the microcontroller. You must explicitly tell Cargo to compile the tests for your host computer's processor architecture:
**Mac (Apple Silicon):**
```bash
cargo test --lib --target aarch64-apple-darwin
```
**Linux (Intel/AMD 64-bit):**
```bash
cargo test --lib --target x86_64-unknown-linux-gnu
```
**Windows (64-bit):**
```bash
cargo test --lib --target x86_64-pc-windows-msvc
```
## 🧠 Code Walkthrough
This section explains exactly how the code works, where the entry point is, and traces the flow of execution as if you were stepping through it line-by-line.
### 1. The Entry Point (`src/main.rs`)
Unlike a standard computer program, bare-metal microcontrollers do not have an operating system to call `main()`. Instead, we use the `#[entry]` macro from the HAL (Hardware Abstraction Layer) to define the very first function that runs after the chip boots up.
* **`main() -> !`**: This is the absolute start of our code. It takes ownership of all the hardware peripherals (`hal::pac::Peripherals::take().unwrap()`) and immediately passes them into `board::run(...)`. The `-> !` means this function never returns (because embedded devices run in an infinite loop).
### 2. Board Initialization (`src/board.rs`)
Once execution enters `board.rs`, we initialize the system clocks, pins, UART (for logging), SysTick (for delay), and a hardware timer (for microsecond precision measurement of IR pulses).
* **`run(...)`**: The master setup function. Calls the helper initialization functions below, prints an initialization banner over UART, and enters the infinite polling loop waiting for IR signals.
* **`poll_receiver(...)`**: Called repeatedly in the main loop. It invokes the decoding sequence (`ir_getkey`) and, if a valid command is returned, formats it and writes it to UART.
* **`ir_getkey(...)`**: The high-level function for receiving a full NEC frame. It waits for the 9ms leader mark and 4.5ms leader space, then attempts to read all 32 data bits, and finally validates the frame using the library.
* **`wait_leader(...)`**: Executes the strict NEC protocol synchronization: waits for the line to go idle, then validates the lengths of the incoming leader mark (active low) and leader space (idle high).
* **`read_nec_bit(...)`**: Waits for the standard 562.5µs bit mark, measures the duration of the following space, and calls the hardware-agnostic `accumulate_nec_bit()` function in the `ir_lib` to pack a 1 (long space) or 0 (short space) into the byte array.
* **`wait_for_level(...)`**: A robust spin-loop that takes a timestamp, checks the GPIO state, and calculates elapsed time, returning the total duration if the state changes before the timeout.
### 3. The Reusable IR Library (`src/ir.rs`)
Because distinguishing between logical 0s and 1s requires precise duration thresholds, and manipulating bits across 4 bytes is tedious, this module handles all pure-logic data validation.
* **`accumulate_nec_bit(...)`**: Shifts the current bit index and inserts a `1` if the measured pulse duration exceeds the 1.2ms threshold (a standard NEC "1" space is ~1.69ms).
* **`validate_nec_frame(...)`**: The NEC protocol transmits the 8-bit Address, the inverse Address, the 8-bit Command, and the inverse Command. This function verifies that `byte0 + byte1 == 0xFF` and `byte2 + byte3 == 0xFF` to ensure data integrity, then returns the Command byte.
* **`format_command(...)`**: Efficiently constructs the final ASCII string containing the hex and decimal representation of the command (e.g., `NEC command: 0x45 (69)`) without allocating memory, allowing the `board.rs` code to pipe the raw bytes directly to UART.
+105
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@@ -0,0 +1,105 @@
//! Implementation module
//!
//! **File:** `build.rs`
//! **Author:** Kevin Thomas
//! **Date:** 2025
//!
//! MIT License
//!
//! Copyright (c) 2025 Kevin Thomas
//!
//! Permission is hereby granted, free of charge, to any person obtaining a copy
//! of this software and associated documentation files (the "Software"), to deal
//! in the Software without restriction, including without limitation the rights
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
//! copies of the Software, and to permit persons to whom the Software is
//! furnished to do so, subject to the following conditions:
//!
//! The above copyright notice and this permission notice shall be included in
//! all copies or substantial portions of the Software.
//!
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
//! SOFTWARE.
// Import dependencies from std::fs
use std::fs::{read_to_string, File};
// Import std::io::Write
use std::io::Write;
// Import std::path::{Path, PathBuf}
use std::path::{Path, PathBuf};
/// The main entry point.
fn main() {
let out = PathBuf::from(std::env::var_os("OUT_DIR").unwrap());
let c = read_to_string(".pico-rs").unwrap_or_default().trim().to_lowercase();
setup_target(&c, &out);
write_riscv(&out);
print_cfgs(&out);
}
/// Executes the setup target operation.
///
/// # Arguments
///
/// * `c` - Target string from config.
/// * `out` - Output path.
fn setup_target(c: &str, out: &Path) {
if c == "rp2040" {
write_rp2040(out);
} else {
write_rp2350(out);
}
}
/// Executes the write rp2040 operation.
///
/// # Arguments
///
/// * `out` - Output path.
fn write_rp2040(out: &Path) {
let b = include_bytes!("rp2040.x");
File::create(out.join("memory.x")).unwrap().write_all(b).unwrap();
println!("cargo::rustc-cfg=rp2040");
println!("cargo:rerun-if-changed=rp2040.x");
}
/// Executes the write rp2350 operation.
///
/// # Arguments
///
/// * `out` - Output path.
fn write_rp2350(out: &Path) {
let b = include_bytes!("rp2350.x");
File::create(out.join("memory.x")).unwrap().write_all(b).unwrap();
println!("cargo::rustc-cfg=rp2350");
println!("cargo:rerun-if-changed=rp2350.x");
}
/// Executes the write riscv operation.
///
/// # Arguments
///
/// * `out` - Output path.
fn write_riscv(out: &Path) {
let b = include_bytes!("rp2350_riscv.x");
File::create(out.join("rp2350_riscv.x")).unwrap().write_all(b).unwrap();
}
/// Executes the print cfgs operation.
///
/// # Arguments
///
/// * `out` - Output path.
fn print_cfgs(out: &Path) {
println!("cargo::rustc-check-cfg=cfg(rp2040)");
println!("cargo::rustc-check-cfg=cfg(rp2350)");
println!("cargo:rustc-link-search={}", out.display());
println!("cargo:rerun-if-changed=.pico-rs");
println!("cargo:rerun-if-changed=rp2350_riscv.x");
println!("cargo:rerun-if-changed=build.rs");
}
+44
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@@ -0,0 +1,44 @@
/*
* SPDX-License-Identifier: MIT OR Apache-2.0
*
* Copyright (c) 2021-2024 The rp-rs Developers
* Copyright (c) 2021 rp-rs organization
* Copyright (c) 2025 Raspberry Pi Ltd.
*/
MEMORY {
BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100
FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100
RAM : ORIGIN = 0x20000000, LENGTH = 256K
SRAM4 : ORIGIN = 0x20040000, LENGTH = 4k
SRAM5 : ORIGIN = 0x20041000, LENGTH = 4k
}
EXTERN(BOOT2_FIRMWARE)
SECTIONS {
.boot2 ORIGIN(BOOT2) :
{
KEEP(*(.boot2));
} > BOOT2
} INSERT BEFORE .text;
SECTIONS {
.boot_info : ALIGN(4)
{
KEEP(*(.boot_info));
} > FLASH
} INSERT AFTER .vector_table;
_stext = ADDR(.boot_info) + SIZEOF(.boot_info);
SECTIONS {
.bi_entries : ALIGN(4)
{
__bi_entries_start = .;
KEEP(*(.bi_entries));
. = ALIGN(4);
__bi_entries_end = .;
} > FLASH
} INSERT AFTER .text;
+47
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@@ -0,0 +1,47 @@
/*
* SPDX-License-Identifier: MIT OR Apache-2.0
*
* Copyright (c) 2021-2024 The rp-rs Developers
* Copyright (c) 2021 rp-rs organization
* Copyright (c) 2025 Raspberry Pi Ltd.
*/
MEMORY {
FLASH : ORIGIN = 0x10000000, LENGTH = 2048K
RAM : ORIGIN = 0x20000000, LENGTH = 512K
SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
}
SECTIONS {
.start_block : ALIGN(4)
{
__start_block_addr = .;
KEEP(*(.start_block));
} > FLASH
} INSERT AFTER .vector_table;
_stext = ADDR(.start_block) + SIZEOF(.start_block);
SECTIONS {
.bi_entries : ALIGN(4)
{
__bi_entries_start = .;
KEEP(*(.bi_entries));
. = ALIGN(4);
__bi_entries_end = .;
} > FLASH
} INSERT AFTER .text;
SECTIONS {
.end_block : ALIGN(4)
{
__end_block_addr = .;
KEEP(*(.end_block));
} > FLASH
} INSERT AFTER .uninit;
PROVIDE(start_to_end = __end_block_addr - __start_block_addr);
PROVIDE(end_to_start = __start_block_addr - __end_block_addr);
+58
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@@ -0,0 +1,58 @@
/*
* SPDX-License-Identifier: MIT OR Apache-2.0
*
* Copyright (c) 2021-2024 The rp-rs Developers
* Copyright (c) 2021 rp-rs organization
* Copyright (c) 2025 Raspberry Pi Ltd.
*/
MEMORY {
FLASH : ORIGIN = 0x10000000, LENGTH = 2048K
RAM : ORIGIN = 0x20000000, LENGTH = 512K
SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
}
PROVIDE(_stext = ORIGIN(FLASH));
PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM));
PROVIDE(_max_hart_id = 0);
PROVIDE(_hart_stack_size = 2K);
PROVIDE(_heap_size = 0);
PROVIDE(InstructionMisaligned = ExceptionHandler);
PROVIDE(InstructionFault = ExceptionHandler);
PROVIDE(IllegalInstruction = ExceptionHandler);
PROVIDE(Breakpoint = ExceptionHandler);
PROVIDE(LoadMisaligned = ExceptionHandler);
PROVIDE(LoadFault = ExceptionHandler);
PROVIDE(StoreMisaligned = ExceptionHandler);
PROVIDE(StoreFault = ExceptionHandler);
PROVIDE(UserEnvCall = ExceptionHandler);
PROVIDE(SupervisorEnvCall = ExceptionHandler);
PROVIDE(MachineEnvCall = ExceptionHandler);
PROVIDE(InstructionPageFault = ExceptionHandler);
PROVIDE(LoadPageFault = ExceptionHandler);
PROVIDE(StorePageFault = ExceptionHandler);
PROVIDE(SupervisorSoft = DefaultHandler);
PROVIDE(MachineSoft = DefaultHandler);
PROVIDE(SupervisorTimer = DefaultHandler);
PROVIDE(MachineTimer = DefaultHandler);
PROVIDE(SupervisorExternal = DefaultHandler);
PROVIDE(MachineExternal = DefaultHandler);
PROVIDE(DefaultHandler = DefaultInterruptHandler);
PROVIDE(ExceptionHandler = DefaultExceptionHandler);
PROVIDE(__pre_init = default_pre_init);
PROVIDE(_setup_interrupts = default_setup_interrupts);
PROVIDE(_mp_hook = default_mp_hook);
PROVIDE(_start_trap = default_start_trap);
SECTIONS
{
.text.dummy (NOLOAD) :
{
. = ABSOLUTE(_stext);
} > FLASH
}
+431
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@@ -0,0 +1,431 @@
//! Implementation module
//!
//! **File:** `board.rs`
//! **Author:** Kevin Thomas
//! **Date:** 2025
//!
//! MIT License
//!
//! Copyright (c) 2025 Kevin Thomas
//!
//! Permission is hereby granted, free of charge, to any person obtaining a copy
//! of this software and associated documentation files (the "Software"), to deal
//! in the Software without restriction, including without limitation the rights
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
//! copies of the Software, and to permit persons to whom the Software is
//! furnished to do so, subject to the following conditions:
//!
//! The above copyright notice and this permission notice shall be included in
//! all copies or substantial portions of the Software.
//!
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
//! SOFTWARE.
// IR pure-logic functions and timing constants
use ir_lib::ir;
// Rate extension trait for .Hz() baud rate construction
use fugit::RateExtU32;
// Clock trait for accessing system clock frequency
use hal::Clock;
// GPIO pin types and function selectors
use hal::gpio::{FunctionNull, FunctionUart, Pin, PullDown, PullNone};
// UART configuration and peripheral types
use hal::uart::{DataBits, Enabled, StopBits, UartConfig, UartPeripheral};
// Alias our HAL crate
#[cfg(rp2350)]
// Import rp235x_hal as hal
use rp235x_hal as hal;
#[cfg(rp2040)]
// Import rp2040_hal as hal
use rp2040_hal as hal;
/// Timer device type for the HAL timer peripheral.
#[cfg(rp2350)]
pub(crate) type HalTimer = hal::Timer<hal::timer::CopyableTimer0>;
/// Timer type alias for RP2040 (non-generic).
#[cfg(rp2040)]
pub(crate) type HalTimer = hal::Timer;
/// External crystal frequency in Hz (12 MHz).
pub(crate) const XTAL_FREQ_HZ: u32 = 12_000_000u32;
/// UART baud rate in bits per second.
pub(crate) const UART_BAUD: u32 = 115_200;
/// GPIO pin number connected to the IR receiver output.
pub(crate) const IR_GPIO: u8 = 5;
/// Delay between decode attempts in milliseconds.
pub(crate) const POLL_MS: u32 = 10;
/// Type alias for the configured TX pin (GPIO 0, UART function, no pull).
pub(crate) type TxPin = Pin<hal::gpio::bank0::Gpio0, FunctionUart, PullNone>;
/// Type alias for the configured RX pin (GPIO 1, UART function, no pull).
pub(crate) type RxPin = Pin<hal::gpio::bank0::Gpio1, FunctionUart, PullNone>;
/// Type alias for the default TX pin state from `Pins::new()`.
pub(crate) type TxPinDefault = Pin<hal::gpio::bank0::Gpio0, FunctionNull, PullDown>;
/// Type alias for the default RX pin state from `Pins::new()`.
pub(crate) type RxPinDefault = Pin<hal::gpio::bank0::Gpio1, FunctionNull, PullDown>;
/// Type alias for the fully-enabled UART0 peripheral with TX/RX p.
pub(crate) type EnabledUart = UartPeripheral<Enabled, hal::pac::UART0, (TxPin, RxPin)>;
/// Initialise system clocks and PLLs from the external 12 MHz crystal.
pub(crate) fn init_clocks(
xosc: hal::pac::XOSC, clocks: hal::pac::CLOCKS, pll_sys: hal::pac::PLL_SYS, pll_usb: hal::pac::PLL_USB,
resets: &mut hal::pac::RESETS, watchdog: &mut hal::Watchdog,
) -> hal::clocks::ClocksManager {
hal::clocks::init_clocks_and_plls(XTAL_FREQ_HZ, xosc, clocks, pll_sys, pll_usb, resets, watchdog).unwrap()
}
/// Unlock the GPIO bank and return the pin set.
pub(crate) fn init_pins(
io_bank0: hal::pac::IO_BANK0,
pads_bank0: hal::pac::PADS_BANK0,
sio: hal::pac::SIO,
resets: &mut hal::pac::RESETS,
) -> hal::gpio::Pins {
let sio = hal::Sio::new(sio);
hal::gpio::Pins::new(io_bank0, pads_bank0, sio.gpio_bank0, resets)
}
/// Initialise UART0 for serial output.
pub(crate) fn init_uart(
uart0: hal::pac::UART0, tx: TxPinDefault, rx: RxPinDefault, rst: &mut hal::pac::RESETS, c: &hal::clocks::ClocksManager
) -> EnabledUart {
let pins = (tx.reconfigure::<FunctionUart, PullNone>(), rx.reconfigure::<FunctionUart, PullNone>());
let cfg = UartConfig::new(UART_BAUD.Hz(), DataBits::Eight, None, StopBits::One);
UartPeripheral::new(uart0, pins, rst).enable(cfg, c.peripheral_clock.freq()).unwrap()
}
/// Create a blocking delay timer from the ARM SysTick peripheral.
///
/// # Arguments
///
/// * `clocks` - The `clocks` parameter.
///
/// # Returns
///
/// A value of type `cortex_m::delay::Delay`.
///
/// # Arguments
///
/// * `clocks` - The `clocks` parameter.
///
/// # Returns
///
/// A value of type `cortex_m::delay::Delay`.
pub(crate) fn init_delay(clocks: &hal::clocks::ClocksManager) -> cortex_m::delay::Delay {
let core = cortex_m::Peripherals::take().unwrap();
cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().to_Hz())
}
/// Read the free-running microsecond timer (lower 32 bits).
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// A 32-bit unsigned integer value.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// A 32-bit unsigned integer value.
fn time_us_32(timer: &HalTimer) -> u32 {
timer.get_counter().ticks() as u32
}
/// Read the current logic level of the IR input pin through the SIO block.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn gpio_read() -> bool {
unsafe { (*hal::pac::SIO::PTR).gpio_in().read().bits() & (1u32 << IR_GPIO) != 0 }
}
/// Wait for the IR pin to reach the requested level or time out.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
/// * `level` - The `level` parameter.
/// * `timeout_us` - The `timeout_us` parameter.
///
/// # Returns
///
/// A value of type `Option<i64>`.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
/// * `level` - The `level` parameter.
/// * `timeout_us` - The `timeout_us` parameter.
///
/// # Returns
///
/// An Optional value.
fn wait_for_level(timer: &HalTimer, level: bool, timeout_us: u32) -> Option<i64> {
let start = time_us_32(timer);
while gpio_read() != level {
let elapsed = time_us_32(timer).wrapping_sub(start) as i64;
if elapsed > timeout_us as i64 { return None; }
}
Some(time_us_32(timer).wrapping_sub(start) as i64)
}
/// Wait for the IR receiver to go idle (LOW).
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn wait_for_idle(timer: &HalTimer) -> bool {
wait_for_level(timer, false, ir::LEADER_START_TIMEOUT_US).is_some()
}
/// Validate the NEC leader mark pulse width.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn validate_leader_mark(timer: &HalTimer) -> bool {
let Some(w) = wait_for_level(timer, true, ir::LEADER_MARK_TIMEOUT_US) else { return false; };
ir::is_valid_leader_mark(w)
}
/// Validate the NEC leader space width.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn validate_leader_space(timer: &HalTimer) -> bool {
let Some(w) = wait_for_level(timer, false, ir::LEADER_SPACE_TIMEOUT_US) else { return false; };
ir::is_valid_leader_space(w)
}
/// Wait for the NEC leader burst and space.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn wait_leader(timer: &HalTimer) -> bool {
wait_for_idle(timer) && validate_leader_mark(timer) && validate_leader_space(timer)
}
/// Wait for the bit mark and measure the bit space width.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// A value of type `Option<i64>`.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// An Optional value.
fn measure_bit_space(timer: &HalTimer) -> Option<i64> {
if wait_for_level(timer, true, ir::BIT_MARK_TIMEOUT_US).is_none() { return None; }
let w = wait_for_level(timer, false, ir::BIT_SPACE_TIMEOUT_US)?;
if !ir::is_valid_bit_space(w) { return None; }
Some(w)
}
/// Read one NEC bit and store it in the frame buffer.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
/// * `data` - Data to send/write.
/// * `bit_index` - The `bit_index` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
/// * `data` - Data to send/write.
/// * `bit_index` - The `bit_index` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn read_nec_bit(timer: &HalTimer, data: &mut [u8; 4], bit_index: usize) -> bool {
let Some(space_width) = measure_bit_space(timer) else { return false; };
ir::accumulate_nec_bit(data, bit_index, space_width); true
}
/// Read a full 32-bit NEC frame.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
/// * `data` - Data to send/write.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
/// * `data` - Data to send/write.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
fn read_32_bits(timer: &HalTimer, data: &mut [u8; 4]) -> bool {
let mut bit_index = 0usize;
while bit_index < ir::FRAME_BITS {
if !read_nec_bit(timer, data, bit_index) { return false; }
bit_index += 1;
}
true
}
/// Block until an NEC key is decoded or return `None` on failure.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// A value of type `Option<u8>`.
///
/// # Arguments
///
/// * `timer` - The `timer` parameter.
///
/// # Returns
///
/// An Optional value.
pub(crate) fn ir_getkey(timer: &HalTimer) -> Option<u8> {
if !wait_leader(timer) { return None; }
let mut data = [0u8; 4];
if !read_32_bits(timer, &mut data) { return None; }
ir::validate_nec_frame(&data)
}
/// Poll the decoder and print the key code when a valid frame is received.
pub(crate) fn poll_receiver(u: &EnabledUart, t: &HalTimer, d: &mut cortex_m::delay::Delay) {
let mut buf = [0u8; 26];
if let Some(command) = ir_getkey(t) {
let len = ir::format_command(&mut buf, command); u.write_full_blocking(&buf[..len]);
}
d.delay_ms(POLL_MS);
}
/// Initialise all peripherals and run the NEC IR receiver demo.
///
/// # Arguments
///
/// * `pac` - PAC Peripherals singleton (consumed).
///
/// # Returns
///
/// A value of type `!`.
///
/// # Arguments
///
/// * `pac` - The `pac` parameter.
///
/// # Returns
///
/// A value of type `!`.
pub(crate) fn run(mut p: hal::pac::Peripherals) -> ! {
let c = init_clocks(p.XOSC, p.CLOCKS, p.PLL_SYS, p.PLL_USB, &mut p.RESETS, &mut hal::Watchdog::new(p.WATCHDOG));
let pins = init_pins(p.IO_BANK0, p.PADS_BANK0, p.SIO, &mut p.RESETS);
let (u, mut d) = (init_uart(p.UART0, pins.gpio0, pins.gpio1, &mut p.RESETS, &c), init_delay(&c));
#[cfg(rp2350)] let t = hal::Timer::new_timer0(p.TIMER0, &mut p.RESETS, &c); #[cfg(rp2040)] let t = hal::Timer::new(p.TIMER, &mut p.RESETS);
let _ = pins.gpio5.into_pull_up_input(); announce_ir(&u);
loop { poll_receiver(&u, &t, &mut d); }
}
/// Print the IR driver initialisation banner over UART.
///
/// # Arguments
///
/// * `uart` - Reference to the enabled UART peripheral for serial output.
///
/// # Arguments
///
/// * `uart` - The `uart` parameter.
fn announce_ir(uart: &EnabledUart) {
uart.write_full_blocking(b"NEC IR driver initialized on GPIO 5\r\n");
uart.write_full_blocking(b"Press a button on your NEC remote...\r\n");
}
+443
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@@ -0,0 +1,443 @@
//! Implementation module
//!
//! **File:** `ir.rs`
//! **Author:** Kevin Thomas
//! **Date:** 2025
//!
//! MIT License
//!
//! Copyright (c) 2025 Kevin Thomas
//!
//! Permission is hereby granted, free of charge, to any person obtaining a copy
//! of this software and associated documentation files (the "Software"), to deal
//! in the Software without restriction, including without limitation the rights
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
//! copies of the Software, and to permit persons to whom the Software is
//! furnished to do so, subject to the following conditions:
//!
//! The above copyright notice and this permission notice shall be included in
//! all copies or substantial portions of the Software.
//!
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
//! SOFTWARE.
/// Leader wait timeout in microseconds.
pub const LEADER_START_TIMEOUT_US: u32 = 150_000;
/// Maximum duration accepted for the NEC leader mark wait.
pub const LEADER_MARK_TIMEOUT_US: u32 = 12_000;
/// Minimum valid NEC leader mark width in microseconds.
pub const LEADER_MARK_MIN_US: i64 = 8_000;
/// Maximum valid NEC leader mark width in microseconds.
pub const LEADER_MARK_MAX_US: i64 = 10_000;
/// Maximum duration accepted for the NEC leader space wait.
pub const LEADER_SPACE_TIMEOUT_US: u32 = 7_000;
/// Minimum valid NEC leader space width in microseconds.
pub const LEADER_SPACE_MIN_US: i64 = 3_500;
/// Maximum valid NEC leader space width in microseconds.
pub const LEADER_SPACE_MAX_US: i64 = 5_000;
/// Maximum duration accepted while waiting for the bit mark to end.
pub const BIT_MARK_TIMEOUT_US: u32 = 1_000;
/// Maximum duration accepted while measuring the data space.
pub const BIT_SPACE_TIMEOUT_US: u32 = 2_500;
/// Minimum valid data space width in microseconds.
pub const BIT_SPACE_MIN_US: i64 = 200;
/// Space width above which a NEC bit is interpreted as logical 1.
pub const BIT_ONE_THRESHOLD_US: i64 = 1_200;
/// Total number of bits in an NEC frame.
pub const FRAME_BITS: usize = 32;
/// Return true if the measured NEC leader mark width is valid.
///
/// # Arguments
///
/// * `duration_us` - The `duration_us` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `duration_us` - The `duration_us` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
#[inline]
pub fn is_valid_leader_mark(duration_us: i64) -> bool {
(LEADER_MARK_MIN_US..=LEADER_MARK_MAX_US).contains(&duration_us)
}
/// Return true if the measured NEC leader space width is valid.
///
/// # Arguments
///
/// * `duration_us` - The `duration_us` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `duration_us` - The `duration_us` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
#[inline]
pub fn is_valid_leader_space(duration_us: i64) -> bool {
(LEADER_SPACE_MIN_US..=LEADER_SPACE_MAX_US).contains(&duration_us)
}
/// Return true if the measured NEC bit space width is valid.
///
/// # Arguments
///
/// * `duration_us` - The `duration_us` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
///
/// # Arguments
///
/// * `duration_us` - The `duration_us` parameter.
///
/// # Returns
///
/// `true` if successful or set, `false` otherwise.
#[inline]
pub fn is_valid_bit_space(duration_us: i64) -> bool { duration_us >= BIT_SPACE_MIN_US }
/// Accumulate a single NEC bit into the 4-byte frame buffer.
///
/// Matches the C implementation exactly: bytes are filled LSB-first.
///
/// # Arguments
///
/// * `data` - Data to send/write.
/// * `bit_index` - The `bit_index` parameter.
/// * `duration_us` - The `duration_us` parameter.
///
/// # Arguments
///
/// * `data` - Data to send/write.
/// * `bit_index` - The `bit_index` parameter.
/// * `duration_us` - The `duration_us` parameter.
#[inline]
pub fn accumulate_nec_bit(data: &mut [u8; 4], bit_index: usize, duration_us: i64) {
let (byte_idx, bit_idx) = (bit_index / 8, bit_index % 8);
if duration_us > BIT_ONE_THRESHOLD_US { data[byte_idx] |= 1u8 << bit_idx; }
}
/// Validate an NEC frame and return the command byte on success.
///
/// # Arguments
///
/// * `data` - Data to send/write.
///
/// # Returns
///
/// A value of type `Option<u8>`.
///
/// # Arguments
///
/// * `data` - Data to send/write.
///
/// # Returns
///
/// An Optional value.
#[inline]
pub fn validate_nec_frame(data: &[u8; 4]) -> Option<u8> {
if data[0].wrapping_add(data[1]) == 0xFF && data[2].wrapping_add(data[3]) == 0xFF { Some(data[2]) } else { None }
}
/// Format the decoded command as hexadecimal and decimal followed by CRLF.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `command` - The `command` parameter.
///
/// # Returns
///
/// A value of type `usize`.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `command` - The `command` parameter.
///
/// # Returns
///
/// A value of type `usize`.
#[inline]
pub fn format_command(buf: &mut [u8], command: u8) -> usize {
let mut pos = copy_slice(buf, 0, b"NEC command: 0x"); pos += format_hex_u8(buf, pos, command);
pos += copy_slice(buf, pos, b" ("); pos += format_u8(buf, pos, command);
pos + copy_slice(buf, pos, b")\r\n")
}
/// Copy a byte slice into `buf` at the given offset, returning bytes written.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `offset` - The `offset` parameter.
/// * `src` - The `src` parameter.
///
/// # Returns
///
/// A value of type `usize`.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `offset` - The `offset` parameter.
/// * `src` - The `src` parameter.
///
/// # Returns
///
/// A value of type `usize`.
#[inline]
fn copy_slice(buf: &mut [u8], offset: usize, src: &[u8]) -> usize {
buf[offset..offset + src.len()].copy_from_slice(src); src.len()
}
/// Format an unsigned 8-bit integer at the given buffer offset.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `pos` - The `pos` parameter.
/// * `value` - Value to use.
///
/// # Returns
///
/// A value of type `usize`.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `pos` - The `pos` parameter.
/// * `value` - Value to use.
///
/// # Returns
///
/// A value of type `usize`.
#[inline]
fn format_u8(buf: &mut [u8], pos: usize, value: u8) -> usize {
let n = u8_digit_count(value); write_u8_digits(buf, pos, value, n); n
}
/// Return the number of decimal digits in a u8.
///
/// # Arguments
///
/// * `value` - Value to use.
///
/// # Returns
///
/// A value of type `usize`.
///
/// # Arguments
///
/// * `value` - Value to use.
///
/// # Returns
///
/// A value of type `usize`.
#[inline]
fn u8_digit_count(value: u8) -> usize {
if value >= 100 { 3 } else if value >= 10 { 2 } else { 1 }
}
/// Write the decimal digits of a u8 into `buf` at `pos`.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `pos` - The `pos` parameter.
/// * `value` - Value to use.
/// * `n` - Nibble or number.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `pos` - The `pos` parameter.
/// * `value` - Value to use.
/// * `n` - Nibble or number.
#[inline]
fn write_u8_digits(buf: &mut [u8], pos: usize, value: u8, n: usize) {
if n >= 3 { buf[pos] = b'0' + value / 100; }
if n >= 2 { buf[pos + n - 2] = b'0' + (value / 10) % 10; }
buf[pos + n - 1] = b'0' + value % 10;
}
/// Format an unsigned 8-bit integer as two uppercase hexadecimal digits.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `pos` - The `pos` parameter.
/// * `value` - Value to use.
///
/// # Returns
///
/// A value of type `usize`.
///
/// # Arguments
///
/// * `buf` - The `buf` parameter.
/// * `pos` - The `pos` parameter.
/// * `value` - Value to use.
///
/// # Returns
///
/// A value of type `usize`.
#[inline]
fn format_hex_u8(buf: &mut [u8], pos: usize, value: u8) -> usize {
buf[pos] = hex_digit((value >> 4) & 0x0F); buf[pos + 1] = hex_digit(value & 0x0F); 2
}
/// Convert a 4-bit value to its uppercase ASCII hex digit.
///
/// # Arguments
///
/// * `value` - Value to use.
///
/// # Returns
///
/// An 8-bit unsigned integer value.
///
/// # Arguments
///
/// * `value` - Value to use.
///
/// # Returns
///
/// An 8-bit unsigned integer value.
#[inline]
fn hex_digit(value: u8) -> u8 {
if value < 10 { b'0' + value } else { b'A' + (value - 10) }
}
#[cfg(test)]
mod tests {
// Import all parent module items
use super::*;
/// Executes the leader mark accepts lower bound operation.
#[test]
fn leader_mark_accepts_lower_bound() {
assert!(is_valid_leader_mark(8_000));
}
/// Executes the leader mark rejects below lower bound operation.
#[test]
fn leader_mark_rejects_below_lower_bound() {
assert!(!is_valid_leader_mark(7_999));
}
/// Executes the leader space accepts upper bound operation.
#[test]
fn leader_space_accepts_upper_bound() {
assert!(is_valid_leader_space(5_000));
}
/// Executes the leader space rejects above upper bound operation.
#[test]
fn leader_space_rejects_above_upper_bound() {
assert!(!is_valid_leader_space(5_001));
}
/// Executes the bit space rejects short pulse operation.
#[test]
fn bit_space_rejects_short_pulse() {
assert!(!is_valid_bit_space(199));
}
/// Executes the bit space accepts threshold operation.
#[test]
fn bit_space_accepts_threshold() {
assert!(is_valid_bit_space(200));
}
/// Executes the accumulate zero bit leaves byte clear operation.
#[test]
fn accumulate_zero_bit_leaves_byte_clear() {
let mut data = [0u8; 4];
accumulate_nec_bit(&mut data, 0, 800);
assert_eq!(data[0], 0);
}
/// Executes the accumulate one bit sets lsb operation.
#[test]
fn accumulate_one_bit_sets_lsb() {
let mut data = [0u8; 4];
accumulate_nec_bit(&mut data, 0, 1_300);
assert_eq!(data[0], 1);
}
/// Executes the accumulate crosses into next byte operation.
#[test]
fn accumulate_crosses_into_next_byte() {
let mut data = [0u8; 4];
accumulate_nec_bit(&mut data, 8, 1_300);
assert_eq!(data[0], 0);
assert_eq!(data[1], 1);
}
/// Executes the validate frame returns command operation.
#[test]
fn validate_frame_returns_command() {
let data = [0x00, 0xFF, 0x45, 0xBA];
assert_eq!(validate_nec_frame(&data), Some(0x45));
}
/// Executes the validate frame rejects bad inverse operation.
#[test]
fn validate_frame_rejects_bad_inverse() {
let data = [0x00, 0xFE, 0x45, 0xBA];
assert_eq!(validate_nec_frame(&data), None);
}
/// Executes the format command single digit operation.
#[test]
fn format_command_single_digit() {
let mut buf = [0u8; 24];
let n = format_command(&mut buf, 7);
assert_eq!(&buf[..n], b"NEC command: 0x07 (7)\r\n");
}
/// Executes the format command three digits operation.
#[test]
fn format_command_three_digits() {
let mut buf = [0u8; 26];
let n = format_command(&mut buf, 255);
assert_eq!(&buf[..n], b"NEC command: 0xFF (255)\r\n");
}
/// Executes the format hex digit alpha operation.
#[test]
fn format_hex_digit_alpha() {
assert_eq!(hex_digit(0x0A), b'A');
}
}
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//! Driver crate
#![deny(missing_docs)]
#![deny(clippy::missing_docs_in_private_items)]
#![cfg_attr(not(test), no_std)]
pub mod ir;
+102
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@@ -0,0 +1,102 @@
//! Driver crate
#![deny(missing_docs)]
#![deny(clippy::missing_docs_in_private_items)]
//! Implementation module
//!
//! **File:** `main.rs`
//! **Author:** Kevin Thomas
//! **Date:** 2025
//!
//! MIT License
//!
//! Copyright (c) 2025 Kevin Thomas
//!
//! Permission is hereby granted, free of charge, to any person obtaining a copy
//! of this software and associated documentation files (the "Software"), to deal
//! in the Software without restriction, including without limitation the rights
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
//! copies of the Software, and to permit persons to whom the Software is
//! furnished to do so, subject to the following conditions:
//!
//! The above copyright notice and this permission notice shall be included in
//! all copies or substantial portions of the Software.
//!
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
//! SOFTWARE.
#![no_std]
#![no_main]
// Board-level helpers: constants, type aliases, and init functions
mod board;
// IR driver module — suppress warnings for unused public API functions
// Debugging output over RTT
use defmt_rtt as _;
// Panic handler for RISC-V targets
#[cfg(target_arch = "riscv32")]
// Import panic_halt as _
use panic_halt as _;
// Panic handler for ARM targets
#[cfg(target_arch = "arm")]
// Import panic_probe as _
use panic_probe as _;
// HAL entry-point macro
use hal::entry;
// Alias our HAL crate
#[cfg(rp2350)]
// Import rp235x_hal as hal
use rp235x_hal as hal;
#[cfg(rp2040)]
// Import rp2040_hal as hal
use rp2040_hal as hal;
/// Second-stage boot loader for RP2040
#[unsafe(link_section = ".boot2")]
#[used]
#[cfg(rp2040)]
pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_W25Q080;
/// Boot metadata for the RP2350 Boot ROM
#[unsafe(link_section = ".start_block")]
#[used]
#[cfg(rp2350)]
pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
/// Application entry point for the NEC IR receiver demo.
///
/// # Returns
///
/// A value of type `!`.
///
/// # Returns
///
/// A value of type `!`.
#[entry]
fn main() -> ! {
board::run(hal::pac::Peripherals::take().unwrap())
}
/// Picotool binary info metadata
#[unsafe(link_section = ".bi_entries")]
#[used]
pub static PICOTOOL_ENTRIES: [hal::binary_info::EntryAddr; 5] = [
hal::binary_info::rp_cargo_bin_name!(),
hal::binary_info::rp_cargo_version!(),
hal::binary_info::rp_program_description!(c"NEC IR Receiver Demo"),
hal::binary_info::rp_cargo_homepage_url!(),
hal::binary_info::rp_program_build_attribute!(),
];
#[cfg(test)]
mod tests {
// Import all parent module items
use super::*;
}