mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
synced 2026-08-18 08:57:26 +02:00
125 lines
2.7 KiB
C
125 lines
2.7 KiB
C
/**
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******************************************************************************
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* @file rp2350_uart.c
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* @author Kevin Thomas
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* @brief UART0 driver implementation for RP2350.
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*
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* Configures UART0 on GPIO 0 (TX) and GPIO 1 (RX) at 115200
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* baud using the 12 MHz XOSC clock.
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 Kevin Thomas.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#include "rp2350_uart.h"
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#define UART_BASE ((volatile uint32_t *) UART0_BASE)
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/**
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* @brief Clear the UART0 reset bit in the reset controller.
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* @retval None
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*/
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static void uart_clear_reset_bit(void)
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{
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uint32_t value;
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value = RESETS->RESET;
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value &= ~(1U << RESETS_RESET_UART0_SHIFT);
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RESETS->RESET = value;
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}
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/**
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* @brief Wait until the UART0 block is out of reset.
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* @retval None
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*/
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static void uart_wait_reset_done(void)
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{
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while ((RESETS->RESET_DONE & (1U << RESETS_RESET_UART0_SHIFT)) == 0) {}
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}
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/**
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* @brief Configure GPIO pins 0 (TX) and 1 (RX) for UART function.
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* @retval None
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*/
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static void uart_configure_pins(void)
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{
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IO_BANK0->GPIO[0].CTRL = IO_BANK0_CTRL_FUNCSEL_UART;
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IO_BANK0->GPIO[1].CTRL = IO_BANK0_CTRL_FUNCSEL_UART;
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PADS_BANK0->GPIO[0] = 0x04;
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PADS_BANK0->GPIO[1] = 0x40;
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}
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/**
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* @brief Set UART0 baud rate divisors for 115200 at 12 MHz.
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* @retval None
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*/
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static void uart_set_baud(void)
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{
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UART_BASE[UART_CR_OFFSET] = 0;
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UART_BASE[UART_IBRD_OFFSET] = 6;
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UART_BASE[UART_FBRD_OFFSET] = 33;
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}
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/**
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* @brief Configure line control and enable UART0.
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* @retval None
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*/
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static void uart_enable(void)
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{
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UART_BASE[UART_LCR_H_OFFSET] = UART_LCR_H_8N1_FIFO;
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UART_BASE[UART_CR_OFFSET] = UART_CR_ENABLE;
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}
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void uart_release_reset(void)
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{
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uart_clear_reset_bit();
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uart_wait_reset_done();
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}
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void uart_init(void)
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{
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uart_configure_pins();
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uart_set_baud();
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uart_enable();
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}
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bool uart_is_readable(void)
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{
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return (UART_BASE[UART_FR_OFFSET] & UART_FR_RXFE_MASK) == 0;
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}
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char uart_getchar(void)
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{
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while (UART_BASE[UART_FR_OFFSET] & UART_FR_RXFE_MASK) {}
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return (char)(UART_BASE[UART_DR_OFFSET] & 0xFF);
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}
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void uart_putchar(char c)
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{
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while (UART_BASE[UART_FR_OFFSET] & UART_FR_TXFF_MASK) {}
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UART_BASE[UART_DR_OFFSET] = (uint32_t)c;
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}
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void uart_puts(const char *str)
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{
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while (*str)
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{
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uart_putchar(*str++);
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}
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}
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char uart_to_upper(char c)
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{
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if (c >= 'a' && c <= 'z')
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return (char)(c - 32);
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return c;
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}
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