mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
synced 2026-05-20 14:54:50 +02:00
Kevin Thomas
339 lines
14 KiB
ArmAsm
339 lines
14 KiB
ArmAsm
/**
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* FILE: main.s
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*
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* DESCRIPTION:
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* RP2350 Bare-Metal GPIO16 Blink, Coprocessor Version.
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*
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* BRIEF:
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* Minimal bare‑metal LED blink on the RP2350 using the direct coprocessor
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* (MCRR) instructions to manipulate GPIO control registers. This bypasses
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* SDK abstractions and demonstrates register‑level control in assembler.
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* Clocks the external crystal oscillator (XOSC) at 14.5MHz.
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*
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* AUTHOR: Kevin Thomas
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* CREATION DATE: October 24, 2025
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* UPDATE DATE: October 25, 2025
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*/
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.syntax unified // use unified assembly syntax
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.cpu cortex-m33 // target Cortex-M33 core
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.thumb // use Thumb instruction set
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/**
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* Memory addresses and constants.
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*/
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.equ STACK_TOP, 0x20082000
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.equ STACK_LIMIT, 0x2007A000
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.equ XOSC_BASE, 0x40048000
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.equ XOSC_CTRL, XOSC_BASE + 0x00
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.equ XOSC_STATUS, XOSC_BASE + 0x04
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.equ XOSC_STARTUP, XOSC_BASE + 0x0C
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.equ PPB_BASE, 0xE0000000
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.equ CPACR, PPB_BASE + 0x0ED88
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.equ CLOCKS_BASE, 0x40010000
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.equ CLK_PERI_CTRL, CLOCKS_BASE + 0x48
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.equ RESETS_BASE, 0x40020000
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.equ RESETS_RESET, RESETS_BASE + 0x0
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.equ RESETS_RESET_CLEAR, RESETS_BASE + 0x3000
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.equ RESETS_RESET_DONE, RESETS_BASE + 0x8
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.equ IO_BANK0_BASE, 0x40028000
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.equ IO_BANK0_GPIO16_CTRL_OFFSET, 0x84
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.equ PADS_BANK0_BASE, 0x40038000
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.equ PADS_BANK0_GPIO16_OFFSET, 0x44
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/**
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* Initialize the .vectors section. The .vectors section contains vector
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* table and Reset_Handler.
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*/
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.section .vectors, "ax" // vector table section
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.align 2 // align to 4-byte boundary
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/**
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* Vector table section.
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*/
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.global _vectors // export _vectors symbol
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_vectors:
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.word STACK_TOP // initial stack pointer
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.word Reset_Handler + 1 // reset handler (Thumb bit set)
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/**
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* @brief Reset handler for RP2350.
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*
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* @details Entry point after reset. Performs:
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* - Stack initialization
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* - Coprocessor enable
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* - GPIO16 pad/function configuration
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* - Branches to main() which contains the blink loop
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*
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* @param None
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* @retval None
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*/
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.global Reset_Handler // export Reset_Handler symbol
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.type Reset_Handler, %function
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Reset_Handler:
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BL Init_Stack // initialize MSP/PSP and limits
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BL Init_XOSC // initialize external crystal oscillator
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BL Enable_XOSC_Peri_Clock // enable XOSC peripheral clock
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BL Init_Subsystem // initialize subsystems
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BL Enable_Coprocessor // enable CP0 coprocessor
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B main // branch to main loop
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.size Reset_Handler, . - Reset_Handler
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/**
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* @brief Initialize stack pointers.
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*
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* @details Sets Main and Process Stack Pointers (MSP/PSP) and their limits.
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*
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* @param None
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* @retval None
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*/
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.type Init_Stack, %function
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Init_Stack:
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LDR R0, =STACK_TOP // load stack top
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MSR PSP, R0 // set PSP
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LDR R0, =STACK_LIMIT // load stack limit
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MSR MSPLIM, R0 // set MSP limit
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MSR PSPLIM, R0 // set PSP limit
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LDR R0, =STACK_TOP // reload stack top
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MSR MSP, R0 // set MSP
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BX LR // return
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/**
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* @brief Init XOSC and wait until it is ready.
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*
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* @details Configures and initializes the external crystal oscillator (XOSC).
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* Waits for the XOSC to become stable before returning.
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*
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* @param None
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* @retval None
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*/
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.type Init_XOSC, %function
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Init_XOSC:
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LDR R0, =XOSC_STARTUP // load XOSC_STARTUP address
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LDR R1, =0x00C4 // set delay 50,000 cycles
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STR R1, [R0] // store value into XOSC_STARTUP
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LDR R0, =XOSC_CTRL // load XOSC_CTRL address
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LDR R1, =0x00FABAA0 // set 1_15MHz, freq range, actual 14.5MHz
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STR R1, [R0] // store value into XOSC_CTRL
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.Init_XOSC_Wait:
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LDR R0, =XOSC_STATUS // load XOSC_STATUS address
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LDR R1, [R0] // read XOSC_STATUS value
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TST R1, #(1<<31) // test STABLE bit
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BEQ .Init_XOSC_Wait // wait until stable bit is set
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BX LR // return
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/**
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* @brief Enable XOSC peripheral clock.
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*
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* @details Sets the peripheral clock to use XOSC as its AUXSRC.
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*
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* @param None
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* @retval None
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*/
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.type Enable_XOSC_Peri_Clock, %function
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Enable_XOSC_Peri_Clock:
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LDR R0, =CLK_PERI_CTRL // load CLK_PERI_CTRL address
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LDR R1, [R0] // read CLK_PERI_CTRL value
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ORR R1, R1, #(1<<11) // set ENABLE bit
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ORR R1, R1, #(4<<5) // set AUXSRC: XOSC_CLKSRC bit
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STR R1, [R0] // store value into CLK_PERI_CTRL
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BX LR // return
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/**
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* @brief Init subsystem.
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*
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* @details Initiates the various subsystems by clearing their reset bits.
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*
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* @param None
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* @retval None
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*/
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.type Init_Subsystem, %function
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Init_Subsystem:
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.GPIO_Subsystem_Reset:
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LDR R0, =RESETS_RESET // load RESETS->RESET address
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LDR R1, [R0] // read RESETS->RESET value
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BIC R1, R1, #(1<<6) // clear IO_BANK0 bit
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STR R1, [R0] // store value into RESETS->RESET address
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.GPIO_Subsystem_Reset_Wait:
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LDR R0, =RESETS_RESET_DONE // load RESETS->RESET_DONE address
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LDR R1, [R0] // read RESETS->RESET_DONE value
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TST R1, #(1<<6) // test IO_BANK0 reset done
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BEQ .GPIO_Subsystem_Reset_Wait // wait until done
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BX LR // return
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/**
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* @brief Enable coprocessor access.
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*
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* @details Grants full access to coprocessor 0 via CPACR.
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*
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* @param None
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* @retval None
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*/
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.type Enable_Coprocessor , %function
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Enable_Coprocessor:
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LDR R0, =CPACR // load CPACR address
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LDR R1, [R0] // read CPACR value
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ORR R1, R1, #(1<<1) // set CP0: Ctrl access priv coproc 0 bit
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ORR R1, R1, #(1<<0) // set CP0: Ctrl access priv coproc 0 bit
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STR R1, [R0] // store value into CPACR
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DSB // data sync barrier
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ISB // instruction sync barrier
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BX LR // return
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/**
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* Initialize the .text section.
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* The .text section contains executable code.
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*/
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.section .text // code section
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.align 2 // align to 4-byte boundary
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/**
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* @brief Main application entry point.
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*
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* @details Implements the infinite blink loop.
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*
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* @param None
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* @retval None
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*/
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.global main // export main
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.type main, %function // mark as function
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main:
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.Push_Registers:
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PUSH {R4-R12, LR} // push registers R4-R12, LR to the stack
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.GPIO16_Config:
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LDR R0, =PADS_BANK0_GPIO16_OFFSET // load PADS_BANK0_GPIO16_OFFSET
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LDR R1, =IO_BANK0_GPIO16_CTRL_OFFSET // load IO_BANK0_GPIO16_CTRL_OFFSET
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LDR R2, =16 // load GPIO number
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BL GPIO_Config // call GPIO_Config
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.Loop:
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LDR R0, =16 // load GPIO number
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BL GPIO_Set // call GPIO_Set
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LDR R0, =500 // 500ms
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BL Delay_MS // call Delay_MS
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LDR R0, =16 // load GPIO number
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BL GPIO_Clear // call GPIO_Clear
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LDR R0, =500 // 500ms
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BL Delay_MS // call Delay_MS
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B .Loop // loop forever
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.Pop_Registers:
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POP {R4-R12, LR} // pop registers R4-R12, LR from the stack
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BX LR // return to caller
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/**
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* @brief Configure GPIO.
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*
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* @details Configures a GPIO pin's pad control and function select.
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*
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* @param R0 - PAD_OFFSET
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* @param R1 - CTRL_OFFSET
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* @param R2 - GPIO
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* @retval None
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*/
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.type GPIO_Config, %function
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GPIO_Config:
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.GPIO_Config_Push_Registers:
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PUSH {R4-R12, LR} // push registers R4-R12, LR to the stack
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.GPIO_Config_Modify_Pad:
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LDR R4, =PADS_BANK0_BASE // load PADS_BANK0_BASE address
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ADD R4, R4, R0 // PADS_BANK0_BASE + PAD_OFFSET
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LDR R5, [R4] // read PAD_OFFSET value
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BIC R5, R5, #(1<<7) // clear OD bit
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ORR R5, R5, #(1<<6) // set IE bit
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BIC R5, R5, #(1<<8) // clear ISO bit
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STR R5, [R4] // store value into PAD_OFFSET
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.GPIO_Config_Modify_CTRL:
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LDR R4, =IO_BANK0_BASE // load IO_BANK0 base
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ADD R4, R4, R1 // IO_BANK0_BASE + CTRL_OFFSET
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LDR R5, [R4] // read CTRL_OFFSET value
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BIC R5, R5, #0x1F // clear FUNCSEL
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ORR R5, R5, #0x05 // set FUNCSEL 0x05->SIO_0
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STR R5, [R4] // store value into CTRL_OFFSET
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.GPIO_Config_Enable_OE:
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LDR R4, =1 // enable output
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MCRR P0, #4, R2, R4, C4 // gpioc_bit_oe_put(GPIO, 1)
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.GPIO_Config_Pop_Registers:
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POP {R4-R12, LR} // pop registers R4-R12, LR from the stack
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BX LR // return
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/**
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* @brief GPIO set.
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*
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* @details Drives GPIO output high via coprocessor.
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*
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* @param R0 - GPIO
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* @retval None
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*/
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.type GPIO_Set, %function
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GPIO_Set:
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.GPIO_Set_Push_Registers:
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PUSH {R4-R12, LR} // push registers R4-R12, LR to the stack
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.GPIO_Set_Execute:
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LDR R4, =1 // enable output
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MCRR P0, #4, R0, R4, C0 // gpioc_bit_out_put(GPIO, 1)
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.GPIO_Set_Pop_Registers:
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POP {R4-R12, LR} // pop registers R4-R12, LR from the stack
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BX LR // return
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/**
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* @brief GPIO clear.
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*
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* @details Drives GPIO output high via coprocessor.
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*
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* @param R0 - GPIO
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* @retval None
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*/
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.type GPIO_Clear, %function
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GPIO_Clear:
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.GPIO_Clear_Push_Registers:
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PUSH {R4-R12, LR} // push registers R4-R12, LR to the stack
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.GPIO_Clear_Execute:
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LDR R4, =0 // disable output
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MCRR P0, #4, R0, R4, C0 // gpioc_bit_out_put(GPIO, 1)
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.GPIO_Clear_Pop_Registers:
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POP {R4-R12, LR} // pop registers R4-R12, LR from the stack
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BX LR // return
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/**
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* @brief Delay_MS.
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*
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* @details Delays for R0 milliseconds. Conversion: loop_count = ms * 3600
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* based on a 14.5MHz clock.
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*
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* @param R0 - milliseconds
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* @retval None
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*/
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.type Delay_MS, %function
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Delay_MS:
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.Delay_MS_Push_Registers:
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PUSH {R4-R12, LR} // push registers R4-R12, LR to the stack
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.Delay_MS_Check:
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CMP R0, #0 // if MS is not valid, return
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BLE .Delay_MS_Done // branch if less or equal to 0
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.Delay_MS_Setup:
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LDR R4, =3600 // loops per MS based on 14.5MHz clock
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MUL R5, R0, R4 // MS * 3600
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.Delay_MS_Loop:
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SUBS R5, R5, #1 // decrement counter
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BNE .Delay_MS_Loop // branch until zero
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.Delay_MS_Done:
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POP {R4-R12, LR} // pop registers R4-R12, LR from the stack
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BX LR // return
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/**
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* Test data and constants.
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* The .rodata section is used for constants and static data.
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*/
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.section .rodata // read-only data section
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/**
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* Initialized global data.
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* The .data section is used for initialized global or static variables.
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*/
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.section .data // data section
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/**
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* Uninitialized global data.
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* The .bss section is used for uninitialized global or static variables.
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*/
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.section .bss // BSS section
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