mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
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305 lines
10 KiB
Rust
305 lines
10 KiB
Rust
//! Implementation module
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//!
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//! **File:** `board.rs`
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//! **Author:** Kevin Thomas
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//! **Date:** 2025
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//!
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//! MIT License
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//!
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//! Copyright (c) 2025 Kevin Thomas
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//!
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//! Permission is hereby granted, free of charge, to any person obtaining a copy
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//! of this software and associated documentation files (the "Software"), to deal
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//! in the Software without restriction, including without limitation the rights
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//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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//! copies of the Software, and to permit persons to whom the Software is
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//! furnished to do so, subject to the following conditions:
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//!
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//! The above copyright notice and this permission notice shall be included in
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//! all copies or substantial portions of the Software.
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//!
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//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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//! SOFTWARE.
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// Watchdog driver pure-logic functions and constants
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use watchdog_lib::watchdog;
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// Microsecond duration type for watchdog timeout
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use fugit::ExtU32;
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// Rate extension trait for .Hz() baud rate construction
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use fugit::RateExtU32;
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// Clock trait for accessing system clock frequency
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use hal::Clock;
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// GPIO pin types and function selectors
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use hal::gpio::{FunctionNull, FunctionUart, Pin, PullDown, PullNone};
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// UART configuration and peripheral types
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use hal::uart::{DataBits, Enabled, StopBits, UartConfig, UartPeripheral};
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// Alias our HAL crate
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#[cfg(rp2350)]
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// Import rp235x_hal as hal
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use rp235x_hal as hal;
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#[cfg(rp2040)]
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// Import rp2040_hal as hal
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use rp2040_hal as hal;
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/// External crystal frequency in Hz (12 MHz).
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pub(crate) const XTAL_FREQ_HZ: u32 = 12_000_000u32;
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/// UART baud rate in bits per second.
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pub(crate) const UART_BAUD: u32 = 115_200;
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/// Type alias for the configured TX pin (GPIO 0, UART function, no pull).
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pub(crate) type TxPin = Pin<hal::gpio::bank0::Gpio0, FunctionUart, PullNone>;
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/// Type alias for the configured RX pin (GPIO 1, UART function, no pull).
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pub(crate) type RxPin = Pin<hal::gpio::bank0::Gpio1, FunctionUart, PullNone>;
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/// Type alias for the default TX pin state from `Pins::new()`.
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pub(crate) type TxPinDefault = Pin<hal::gpio::bank0::Gpio0, FunctionNull, PullDown>;
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/// Type alias for the default RX pin state from `Pins::new()`.
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pub(crate) type RxPinDefault = Pin<hal::gpio::bank0::Gpio1, FunctionNull, PullDown>;
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/// Type alias for the fully-enabled UART0 peripheral with TX/RX p.
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pub(crate) type EnabledUart = UartPeripheral<Enabled, hal::pac::UART0, (TxPin, RxPin)>;
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/// Initialise system clocks and PLLs from the external 12 MHz crystal.
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///
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/// # Arguments
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///
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/// * `xosc` - XOSC peripheral singleton.
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/// * `clocks` - CLOCKS peripheral singleton.
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/// * `pll_sys` - PLL_SYS peripheral singleton.
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/// * `pll_usb` - PLL_USB peripheral singleton.
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/// * `resets` - Mutable reference to the RESETS peripheral.
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/// * `watchdog` - Mutable reference to the watchdog timer.
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///
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/// # Returns
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///
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/// Configured clocks manager.
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///
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/// # Panics
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///
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/// Panics if clock initialisation fails.
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pub(crate) fn init_clocks(
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xosc: hal::pac::XOSC, clocks: hal::pac::CLOCKS, pll_sys: hal::pac::PLL_SYS, pll_usb: hal::pac::PLL_USB,
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resets: &mut hal::pac::RESETS, watchdog: &mut hal::Watchdog,
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) -> hal::clocks::ClocksManager {
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hal::clocks::init_clocks_and_plls(XTAL_FREQ_HZ, xosc, clocks, pll_sys, pll_usb, resets, watchdog).unwrap()
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}
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/// Unlock the GPIO bank and return the pin set.
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///
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/// # Arguments
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///
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/// * `io_bank0` - IO_BANK0 peripheral singleton.
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/// * `pads_bank0` - PADS_BANK0 peripheral singleton.
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/// * `sio` - SIO peripheral singleton.
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/// * `resets` - Mutable reference to the RESETS peripheral.
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///
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/// # Returns
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///
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/// GPIO pin set for the entire bank.
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pub(crate) fn init_pins(
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io: hal::pac::IO_BANK0, pads: hal::pac::PADS_BANK0, sio: hal::pac::SIO, rst: &mut hal::pac::RESETS
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) -> hal::gpio::Pins {
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hal::gpio::Pins::new(io, pads, hal::Sio::new(sio).gpio_bank0, rst)
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}
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/// Initialise UART0 for serial output (stdio equivalent).
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///
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/// # Arguments
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///
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/// * `uart0` - PAC UART0 peripheral singleton.
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/// * `tx_pin` - GPIO pin to use as UART0 TX (GPIO 0).
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/// * `rx_pin` - GPIO pin to use as UART0 RX (GPIO 1).
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/// * `resets` - Mutable reference to the RESETS peripheral.
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/// * `clocks` - Reference to the initialised clock configuration.
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///
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/// # Returns
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///
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/// Enabled UART0 peripheral ready for blocking writes.
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///
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/// # Panics
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///
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/// Panics if the HAL cannot achieve the requested baud rate.
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pub(crate) fn init_uart(
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uart0: hal::pac::UART0, tx: TxPinDefault, rx: RxPinDefault, rst: &mut hal::pac::RESETS, c: &hal::clocks::ClocksManager
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) -> EnabledUart {
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let pins = (tx.reconfigure::<FunctionUart, PullNone>(), rx.reconfigure::<FunctionUart, PullNone>());
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let cfg = UartConfig::new(UART_BAUD.Hz(), DataBits::Eight, None, StopBits::One);
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UartPeripheral::new(uart0, pins, rst).enable(cfg, c.peripheral_clock.freq()).unwrap()
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}
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/// Create a blocking delay timer from the ARM SysTick peripheral.
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///
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/// # Arguments
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///
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/// * `clocks` - Reference to the initialised clock configuration.
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///
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/// # Returns
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///
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/// Blocking delay provider.
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///
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/// # Panics
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///
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/// Panics if the cortex-m core peripherals have already been taken.
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///
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/// # Arguments
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///
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/// * `clocks` - The `clocks` parameter.
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///
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/// # Returns
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///
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/// A value of type `cortex_m::delay::Delay`.
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pub(crate) fn init_delay(clocks: &hal::clocks::ClocksManager) -> cortex_m::delay::Delay {
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let core = cortex_m::Peripherals::take().unwrap();
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cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().to_Hz())
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}
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/// Check whether the last reset was caused by the watchdog.
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///
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/// Reads the WATCHDOG REASON register directly from the PAC. Returns
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/// `true` if either the timer or force bits are set, matching the
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/// C SDK `watchdog_caused_reboot()` behaviour.
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///
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/// # Returns
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///
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/// `true` if the watchdog triggered the last reset.
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///
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/// # Returns
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///
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/// `true` if successful or set, `false` otherwise.
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pub(crate) fn watchdog_caused_reboot() -> bool {
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let r = unsafe { &*hal::pac::WATCHDOG::ptr() }.reason().read();
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r.timer().bit_is_set() || r.force().bit_is_set()
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}
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/// Enable the hardware watchdog with the specified timeout.
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///
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/// Wraps `hal::Watchdog::start()` converting the timeout from
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/// milliseconds to microseconds as required by the HAL.
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///
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/// # Arguments
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///
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/// * `watchdog` - Mutable reference to the HAL watchdog.
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/// * `timeout_ms` - Timeout in milliseconds (1–8388).
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///
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/// # Arguments
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///
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/// * `watchdog` - The `watchdog` parameter.
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/// * `timeout_ms` - The `timeout_ms` parameter.
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pub(crate) fn watchdog_enable(watchdog: &mut hal::Watchdog, timeout_ms: u32) {
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watchdog.start((timeout_ms * 1_000).micros());
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}
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/// Feed the hardware watchdog to prevent a reboot.
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///
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/// Wraps `hal::Watchdog::feed()`.
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///
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/// # Arguments
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///
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/// * `watchdog` - Reference to the HAL watchdog.
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///
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/// # Arguments
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///
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/// * `watchdog` - The `watchdog` parameter.
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pub(crate) fn watchdog_feed(watchdog: &hal::Watchdog) {
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watchdog.feed();
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}
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/// Run the watchdog feed-and-report loop.
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///
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/// Feeds the watchdog every 1 second and prints `"Watchdog fed\r\n"`
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/// over UART, matching the C demo's `_feed_and_report()` function.
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/// This function never returns.
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///
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/// # Arguments
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///
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/// * `uart` - Reference to the enabled UART peripheral for serial output.
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/// * `watchdog` - Reference to the HAL watchdog.
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/// * `delay` - Mutable reference to the blocking delay provider.
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/// * `state` - Mutable reference to the watchdog driver state.
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pub(crate) fn feed_loop(
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uart: &EnabledUart, wd: &hal::Watchdog, delay: &mut cortex_m::delay::Delay, state: &mut watchdog::WatchdogDriverState
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) -> ! {
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loop {
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watchdog_feed(wd); state.feed();
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let mut buf = [0u8; 32]; let n = watchdog::format_fed(&mut buf);
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uart.write_full_blocking(&buf[..n]); delay.delay_ms(watchdog::FEED_INTERVAL_MS);
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}
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}
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/// Initialise all peripherals and run the watchdog feed demo.
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///
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/// # Arguments
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///
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/// * `pac` - PAC Peripherals singleton (consumed).
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///
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/// # Returns
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///
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/// A value of type `!`.
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///
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/// # Arguments
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///
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/// * `pac` - The `pac` parameter.
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///
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/// # Returns
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///
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/// A value of type `!`.
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pub(crate) fn run(mut p: hal::pac::Peripherals) -> ! {
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let mut wd = hal::Watchdog::new(p.WATCHDOG);
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let c = init_clocks(p.XOSC, p.CLOCKS, p.PLL_SYS, p.PLL_USB, &mut p.RESETS, &mut wd);
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let pins = init_pins(p.IO_BANK0, p.PADS_BANK0, p.SIO, &mut p.RESETS);
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let (u, mut d) = (init_uart(p.UART0, pins.gpio0, pins.gpio1, &mut p.RESETS, &c), init_delay(&c));
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report_reset_reason(&u);
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let mut state = start_watchdog(&u, &mut wd);
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feed_loop(&u, &wd, &mut d, &mut state)
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}
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/// Print whether the last reset was caused by the watchdog.
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///
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/// # Arguments
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///
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/// * `uart` - Reference to the enabled UART peripheral for serial output.
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///
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/// # Arguments
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///
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/// * `uart` - The `uart` parameter.
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fn report_reset_reason(uart: &EnabledUart) {
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let mut buf = [0u8; 64];
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let n = watchdog::format_reset_reason(&mut buf, watchdog_caused_reboot());
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uart.write_full_blocking(&buf[..n]);
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}
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/// Create the driver state, enable the hardware watchdog, and report.
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///
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/// # Arguments
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///
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/// * `uart` - Reference to the enabled UART peripheral for serial output.
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/// * `wd` - Mutable reference to the HAL watchdog.
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///
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/// # Returns
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///
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/// Initialised watchdog driver state.
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///
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/// # Arguments
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///
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/// * `uart` - The `uart` parameter.
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/// * `wd` - The `wd` parameter.
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///
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/// # Returns
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///
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/// A value of type `watchdog::WatchdogDriverState`.
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fn start_watchdog(uart: &EnabledUart, wd: &mut hal::Watchdog) -> watchdog::WatchdogDriverState {
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let mut state = watchdog::WatchdogDriverState::new(); state.enable(watchdog::DEFAULT_TIMEOUT_MS);
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watchdog_enable(wd, watchdog::DEFAULT_TIMEOUT_MS);
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let mut buf = [0u8; 64]; let n = watchdog::format_enabled(&mut buf, watchdog::DEFAULT_TIMEOUT_MS);
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uart.write_full_blocking(&buf[..n]); state
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}
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