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https://github.com/khanhduytran0/coruna.git
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khanhduytran0
228 lines
7.8 KiB
C
228 lines
7.8 KiB
C
/*
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This file has been generated by IDA.
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It contains local type definitions from
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the type library 'entry1_type0x09.dylib'
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*/
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#include "ida_types.h"
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#define __int8 char
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#define __int16 short
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#define __int32 int
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#define __int64 long long
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/* 160 */
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enum CPUFamily : uint32_t
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{
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CPUFamily_ARM_CYCLONE = 0x37A09642,
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CPUFamily_A8 = 0x2C91A47E,
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CPUFamily_A9 = 0x92FB37C8,
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CPUFamily_A10 = 0x67CEEE93,
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CPUFamily_A11 = 0xE81E7EF6,
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CPUFamily_A12 = 0x7D34B9F,
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CPUFamily_A13 = 0x462504D2,
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CPUFamily_A14 = 0x1B588BB3,
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CPUFamily_A15 = 0xDA33D83D,
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CPUFamily_A16 = 0x8765EDEA,
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CPUFamily_A17 = 0x2876F5B5,
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CPUFamily_ARM_TYPHOON = CPUFamily_A8,
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CPUFamily_ARM_TWISTER = CPUFamily_A9,
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CPUFamily_ARM_HURRICANE = CPUFamily_A10,
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CPUFamily_ARM_MONSOON_MISTRAL = CPUFamily_A11,
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CPUFamily_ARM_VORTEX_TEMPEST = CPUFamily_A12,
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CPUFamily_ARM_LIGHTNING_THUNDER = CPUFamily_A13,
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CPUFamily_ARM_FIRESTORM_ICESTORM = CPUFamily_A14,
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CPUFamily_ARM_BLIZZARD_AVALANCHE = CPUFamily_A15,
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CPUFamily_ARM_EVEREST_SAWTOOTH = CPUFamily_A16,
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CPUFamily_ARM_COLL = CPUFamily_A17,
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CPUFamily_ARM_IBIZA = 0xFA33415E,
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CPUFamily_ARM_PALMA = 0x72015832,
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CPUFamily_ARM_LOBOS = 0x5F4DEA93,
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CPUFamily_ARM_DONAN = 0x6F5129AC,
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CPUFamily_ARM_BRAVA = 0x17D5B93A,
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CPUFamily_ARM_TAHITI = 0x75D4ACB9,
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CPUFamily_ARM_TUPAI = 0x204526D0,
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CPUFamily_ARM_THERA = 0xAB345F09,
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CPUFamily_ARM_TILOS = 0x01D7A72B,
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CPUFamily_ARM_UNKNOWN_573B5EEC = 0x573B5EEC,
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};
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#define XNU_VERSION_PACKED(major, minor, patch, build, variant) \
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(((uint64_t)((major) & 0x7FFF) << 40) | ((uint64_t)((minor) & 0x3FF) << 30) | ((uint64_t)((patch) & 0x3FF) << 20) | ((uint64_t)((build) & 0x3FF) << 10) | (uint64_t)((variant) & 0x3FF))
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/* 164 */
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struct struct_krwCtx
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{
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uint32_t flags;
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uint8_t gap4[168];
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uint32_t threadForKernelRead;
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uint8_t gap42[144];
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int xnuMajorVersion;
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uint8_t gap144[20];
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uint64_t xnuVersionPacked;
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uint8_t gap160[8];
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int stride168;
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int gap16C[5];
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int pageSizeOrSomething;
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int gap16C2;
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uint64_t pageMask;
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uint8_t gap190[136];
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uint64_t gap190u;
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uint8_t gap190_[56];
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int isRW;
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struct mach_timebase_info timebase;
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mach_port_t semaphore;
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pthread_mutex_t someMutex;
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uint32_t someInt1;
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uint32_t someInt2;
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uint64_t gap19100[16];
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pthread_mutex_t someMutex2;
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uint64_t gap191[695];
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uint32_t gap1909;
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uint32_t gap1910;
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uint32_t gap1911[2];
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uint32_t gap1913;
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uint32_t gap1914;
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uint32_t gap1915;
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uint32_t gap1916;
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uint64_t gap192[16];
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uint64_t machHeaderPlus0x8000;
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uint64_t gap19210;
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uint64_t gap19211;
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uint64_t slideMaybe;
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uint64_t gap1921[108];
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uint64_t IOKitConnInfo;
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};
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typedef struct struct_krwCtx struct_krwCtx;
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/* 165 */
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struct __attribute__((packed)) __attribute__((aligned(4))) struct_IOKitConnInfo
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{
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_BYTE gap0[80];
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_QWORD qword50;
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_QWORD qword58;
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_QWORD qword60;
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_QWORD qword68;
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_DWORD ioPort;
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};
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typedef struct __attribute__((packed)) __attribute__((aligned(4))) struct_IOKitConnInfo struct_IOKitConnInfo;
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/* 166 */
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struct __attribute__((packed)) __attribute__((aligned(8))) struct_xnuMajorVersion
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{
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_OWORD majorVersion;
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_OWORD oword10;
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_QWORD qword20;
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};
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typedef struct __attribute__((packed)) __attribute__((aligned(8))) struct_xnuMajorVersion struct_xnuMajorVersion;
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/* 168 */
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struct __attribute__((packed)) __attribute__((aligned(2))) struct_v83
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{
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_BYTE gap0[48];
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_DWORD dword30;
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_BYTE gap34[4];
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_DWORD dword38;
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_BYTE gap3C[52];
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_OWORD xnuMajorVersion;
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_OWORD oword80;
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_QWORD qword90;
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_DWORD dword98;
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_BYTE gap9C[12];
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_QWORD qwordA8;
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_BYTE gapB0[81];
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_BYTE byte101;
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};
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typedef struct __attribute__((packed)) __attribute__((aligned(2))) struct_v83 struct_v83;
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/* 169 */
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struct __attribute__((packed)) __attribute__((aligned(8))) struct_a1
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{
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_OWORD oword0;
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_OWORD oword10;
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_OWORD oword20;
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_OWORD oword30;
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_OWORD oword40;
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_OWORD oword50;
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_OWORD oword60;
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_OWORD xnuMajorVersion;
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_OWORD oword80;
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_OWORD oword90;
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_OWORD owordA0;
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_OWORD owordB0;
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_OWORD owordC0;
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_OWORD owordD0;
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_OWORD owordE0;
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_OWORD owordF0;
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_OWORD oword100;
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_OWORD oword110;
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_QWORD qword120;
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};
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typedef struct __attribute__((packed)) __attribute__((aligned(8))) struct_a1 struct_a1;
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/* 173 */
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enum krw_ctx_flags
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{
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KRW_CTX_FLAG_CPU_A12 = 0x00000001,
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KRW_CTX_FLAG_MOBILEBACKUP_SANDBOX_PATCHED = 0x00000004,
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KRW_CTX_FLAG_CPU_HIGH_CORE_CLUSTER = 0x00000008,
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KRW_CTX_FLAG_HOST_PORT_READY = 0x00000010,
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KRW_CTX_FLAG_PAC_KERNEL_LAYOUT = 0x00000020,
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KRW_CTX_FLAG_CPU_A10 = 0x00000040,
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KRW_CTX_FLAG_KERNEL_PORT_READY = 0x00000100,
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KRW_CTX_FLAG_CPU_A11 = 0x00000200,
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KRW_CTX_FLAG_SNAPSHOT_MOUNTED = 0x00000400,
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KRW_CTX_FLAG_HAS_AUXKC_INFO = 0x00001000,
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KRW_CTX_FLAG_CPU_A9 = 0x00002000,
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KRW_CTX_FLAG_CPU_A13 = 0x00004000,
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KRW_CTX_FLAG_CPU_A8 = 0x00008000,
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KRW_CTX_FLAG_KRW_METHODS_READY = 0x00010000,
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KRW_CTX_FLAG_CPU_A14 = 0x00080000,
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KRW_CTX_FLAG_CPU_A15 = 0x00100000,
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// These two bits are queried by dmaFail, but no ctx setter has been found in this dylib.
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// The same numeric values also appear as 2 MiB / 32 MiB translation block sizes.
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KRW_CTX_FLAG_CPU_A14_DMA_ALT_UNSET = 0x00200000,
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// Included in the original binary's broader A12+ guard mask, but no setter has been found yet.
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KRW_CTX_FLAG_CPU_A12_TO_A17_UNKNOWN = 0x00400000,
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KRW_CTX_FLAG_SELF_TASK_PORT_CLEARED = 0x00800000,
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KRW_CTX_FLAG_CPU_A16 = 0x01000000,
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KRW_CTX_FLAG_CPU_A15_DMA_ALT_UNSET = 0x02000000,
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KRW_CTX_FLAG_CPU_A17 = 0x04000000,
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KRW_CTX_FLAG_SELF_TASK_IPC_SPACE_CLEARED = 0x08000000,
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KRW_CTX_FLAG_LOW_MEMORY_DEVICE = 0x10000000,
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KRW_CTX_FLAG_CS_TXM = KRW_CTX_FLAG_PAC_KERNEL_LAYOUT,
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KRW_CTX_FLAG_CS_PPL_MAYBE = KRW_CTX_FLAG_CPU_HIGH_CORE_CLUSTER,
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KRW_CTX_FLAG_CPU_A13_A14_MASK = KRW_CTX_FLAG_CPU_A13 | KRW_CTX_FLAG_CPU_A14,
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KRW_CTX_FLAG_CPU_A12_A13_A14_MASK = KRW_CTX_FLAG_CPU_A12 | KRW_CTX_FLAG_CPU_A13_A14_MASK,
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KRW_CTX_FLAG_CPU_A15_A16_MASK = KRW_CTX_FLAG_CPU_A15 | KRW_CTX_FLAG_CPU_A16,
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KRW_CTX_FLAG_CPU_A14_DMA_ALT = KRW_CTX_FLAG_CPU_A14_DMA_ALT_UNSET,
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KRW_CTX_FLAG_CPU_A15_DMA_ALT = KRW_CTX_FLAG_CPU_A15_DMA_ALT_UNSET,
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KRW_CTX_FLAG_CPU_A14_A15_DMA_ALT_MASK = KRW_CTX_FLAG_CPU_A14_DMA_ALT_UNSET | KRW_CTX_FLAG_CPU_A15_DMA_ALT_UNSET,
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KRW_CTX_FLAG_CPU_A16_A17_MASK = KRW_CTX_FLAG_CPU_A16 | KRW_CTX_FLAG_CPU_A17,
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KRW_CTX_FLAG_CPU_A14_A15_A16_MASK = KRW_CTX_FLAG_CPU_A14 | KRW_CTX_FLAG_CPU_A15_A16_MASK,
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KRW_CTX_FLAG_CPU_A15_A16_A17_MASK = KRW_CTX_FLAG_CPU_A15_A16_MASK | KRW_CTX_FLAG_CPU_A17,
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KRW_CTX_FLAG_CPU_A13_A14_A15_A16_MASK = KRW_CTX_FLAG_CPU_A13_A14_MASK | KRW_CTX_FLAG_CPU_A15_A16_MASK,
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KRW_CTX_FLAG_CPU_A12_A13_A14_A15_A16_MASK = KRW_CTX_FLAG_CPU_A12 | KRW_CTX_FLAG_CPU_A13_A14_A15_A16_MASK,
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KRW_CTX_FLAG_CPU_A11_A12_A13_A14_A15_A16_MASK = KRW_CTX_FLAG_CPU_A11 | KRW_CTX_FLAG_CPU_A12_A13_A14_A15_A16_MASK,
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KRW_CTX_FLAG_CPU_A13_A14_A15_A16_A17_MASK = KRW_CTX_FLAG_CPU_A13_A14_A15_A16_MASK | KRW_CTX_FLAG_CPU_A17,
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KRW_CTX_FLAG_CPU_A12_A13_A14_A15_A16_A17_MASK = KRW_CTX_FLAG_CPU_A12_A13_A14_A15_A16_MASK | KRW_CTX_FLAG_CPU_A17,
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KRW_CTX_FLAG_CPU_A11_A12_A13_A14_A15_A16_A17_MASK =
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KRW_CTX_FLAG_CPU_A11_A12_A13_A14_A15_A16_MASK | KRW_CTX_FLAG_CPU_A17,
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KRW_CTX_FLAG_CPU_A10_A11_A9_MASK = KRW_CTX_FLAG_CPU_A10 | KRW_CTX_FLAG_CPU_A11 | KRW_CTX_FLAG_CPU_A9,
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KRW_CTX_FLAG_CPU_A12_A13_MASK = KRW_CTX_FLAG_CPU_A12 | KRW_CTX_FLAG_CPU_A13,
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KRW_CTX_FLAG_CPU_A8_TO_A17_MASK =
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KRW_CTX_FLAG_CPU_A8 | KRW_CTX_FLAG_CPU_A9 | KRW_CTX_FLAG_CPU_A10 | KRW_CTX_FLAG_CPU_A11 |
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KRW_CTX_FLAG_CPU_A12_A13_A14_A15_A16_A17_MASK,
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/*
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* Historical decompiler names. The original binary uses CPU-only masks here
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* (0x5584001 and 0x5584201); SELF_TASK_PORT_CLEARED is handled separately.
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*/
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KRW_CTX_FLAG_CPU_A12_TO_A17_OR_SELF_TASK_PORT_MASK =
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KRW_CTX_FLAG_CPU_A12_A13_A14_A15_A16_A17_MASK | KRW_CTX_FLAG_CPU_A12_TO_A17_UNKNOWN,
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KRW_CTX_FLAG_CPU_A11_TO_A17_OR_SELF_TASK_PORT_MASK =
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KRW_CTX_FLAG_CPU_A11_A12_A13_A14_A15_A16_A17_MASK | KRW_CTX_FLAG_CPU_A12_TO_A17_UNKNOWN,
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};
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