Add Appendix C: I2S Bidirectional Capability activation sequence analysis

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Joseph Goydish II
2025-12-20 14:51:58 -05:00
parent 6e4e386d48
commit 53f350d273

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Activation Sequence: I2S Bidirectional Capability
Between I2S writes at 0xE0817B and 0xE08590:
- 1050 bytes between events
- GPIO ops: 14 (SETB 0x34, CLR/SETB 0x32, 0x38, 0x2B, multiple toggles)
- Final: SETB 0x38 at 0xE08593 — activation before I2S bidirectional write
After I2S bidirectional:
- 4 GPIO ops within next 184 bytes
- CLR 0x38 at 0xE08641 (possible “deactivation/cleanup”)
Pattern:
1. Multiple GPIO toggles
2. SETB 0x38 [activation]
3. I2S bidirectional mode write
4. Operation executes
5. CLR 0x38 [cleanup]
6. Return to normal I2S mode