mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
synced 2026-05-25 08:54:05 +02:00
Add new driver implementations and workspace updates
This commit is contained in:
Kevin Thomas
@@ -0,0 +1,11 @@
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# Object files
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*.o
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# Executable and Linkable Format files
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*.elf
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# Binary files
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*.bin
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# UF2 files
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*.uf2
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@@ -0,0 +1,90 @@
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@echo off
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REM ==============================================================================
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REM FILE: build.bat
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REM
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REM DESCRIPTION:
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REM Build script for RP2350.
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REM
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REM BRIEF:
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REM Automates the process of assembling, linking, and generating UF2 firmware.
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REM
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REM AUTHOR: Kevin Thomas
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REM CREATION DATE: October 5, 2025
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REM UPDATE DATE: October 5, 2025
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REM ==============================================================================
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echo Building...
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REM ==============================================================================
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REM Assemble Source Files
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REM ==============================================================================
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb vector_table.s -o vector_table.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb reset_handler.s -o reset_handler.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb stack.s -o stack.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb xosc.s -o xosc.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb reset.s -o reset.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb coprocessor.s -o coprocessor.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb uart.s -o uart_module.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb gpio.s -o gpio.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb delay.s -o delay.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb main.s -o main.o
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if errorlevel 1 goto error
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arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb image_def.s -o image_def.o
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if errorlevel 1 goto error
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REM ==============================================================================
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REM Link Object Files
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REM ==============================================================================
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arm-none-eabi-ld -g -T linker.ld vector_table.o reset_handler.o stack.o xosc.o reset.o coprocessor.o uart_module.o gpio.o delay.o main.o image_def.o -o uart.elf
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if errorlevel 1 goto error
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REM ==============================================================================
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REM Create Raw Binary from ELF
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REM ==============================================================================
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arm-none-eabi-objcopy -O binary uart.elf uart.bin
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if errorlevel 1 goto error
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REM ==============================================================================
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REM Create UF2 Image for RP2350
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REM -b 0x10000000 : base address
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REM -f 0xe48bff59 : RP2350 family ID
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REM ==============================================================================
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python uf2conv.py -b 0x10000000 -f 0xe48bff59 -o uart.uf2 uart.bin
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if errorlevel 1 goto error
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REM ==============================================================================
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REM Success Message and Flashing Instructions
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REM ==============================================================================
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echo.
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echo =================================
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echo SUCCESS! Created uart.uf2
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echo =================================
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echo.
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echo To flash via UF2:
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echo 1. Hold BOOTSEL button
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echo 2. Plug in USB
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echo 3. Copy uart.uf2 to RP2350 drive
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echo.
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echo To flash via OpenOCD (debug probe):
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echo openocd -f interface/cmsis-dap.cfg -f target/rp2350.cfg -c "adapter speed 5000" -c "program uart.elf verify reset exit"
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echo.
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goto end
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REM ==============================================================================
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REM Error Handling
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REM ==============================================================================
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:error
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echo.
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echo BUILD FAILED!
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echo.
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:end
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@@ -0,0 +1,59 @@
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@echo off
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REM ==============================================================================
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REM FILE: clean.bat
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REM
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REM DESCRIPTION:
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REM Clean script for RP2350.
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REM
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REM BRIEF:
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REM Removes all build artifacts including object files, ELF, binary, and UF2.
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REM
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REM AUTHOR: Kevin Thomas
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REM CREATION DATE: November 27, 2025
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REM UPDATE DATE: November 27, 2025
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REM ==============================================================================
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echo Cleaning build artifacts...
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REM ==============================================================================
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REM Delete Object Files
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REM ==============================================================================
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if exist *.o (
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del /Q *.o
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echo Deleted object files
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) else (
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echo No object files found
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)
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REM ==============================================================================
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REM Delete ELF Files
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REM ==============================================================================
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if exist *.elf (
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del /Q *.elf
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echo Deleted ELF files
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) else (
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echo No ELF files found
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)
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REM ==============================================================================
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REM Delete Binary Files
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REM ==============================================================================
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if exist *.bin (
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del /Q *.bin
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echo Deleted binary files
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) else (
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echo No binary files found
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)
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REM ==============================================================================
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REM Delete UF2 Files
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REM ==============================================================================
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if exist *.uf2 (
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del /Q *.uf2
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echo Deleted UF2 files
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) else (
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echo No UF2 files found
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)
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echo.
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echo Clean complete!
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@@ -0,0 +1,41 @@
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/**
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* FILE: constants.s
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*
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* DESCRIPTION:
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* RP2350 Memory Addresses and Constants.
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*
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* BRIEF:
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* Defines all memory-mapped register addresses and constants used
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* throughout the RP2350 driver.
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*
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* AUTHOR: Kevin Thomas
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* CREATION DATE: November 27, 2025
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* UPDATE DATE: November 27, 2025
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*/
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.syntax unified // use unified assembly syntax
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.cpu cortex-m33 // target Cortex-M33 core
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.thumb // use Thumb instruction set
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/**
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* Memory addresses and constants.
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*/
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.equ STACK_TOP, 0x20082000 // top of stack
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.equ STACK_LIMIT, 0x2007a000 // stack limit
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.equ XOSC_BASE, 0x40048000 // XOSC base address
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.equ XOSC_CTRL, XOSC_BASE + 0x00 // XOSC control register
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.equ XOSC_STATUS, XOSC_BASE + 0x04 // XOSC status register
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.equ XOSC_STARTUP, XOSC_BASE + 0x0c // XOSC startup register
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.equ PPB_BASE, 0xe0000000 // PPB base address
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.equ CPACR, PPB_BASE + 0x0ed88 // coprocessor access control
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.equ CLOCKS_BASE, 0x40010000 // clocks base address
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.equ CLK_PERI_CTRL, CLOCKS_BASE + 0x48 // peripheral clock control
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.equ RESETS_BASE, 0x40020000 // resets base address
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.equ RESETS_RESET, RESETS_BASE + 0x0 // reset register
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.equ RESETS_RESET_CLEAR, RESETS_BASE + 0x3000 // reset clear (atomic)
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.equ RESETS_RESET_DONE, RESETS_BASE + 0x8 // reset done register
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.equ IO_BANK0_BASE, 0x40028000 // IO_BANK0 base address
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.equ IO_BANK0_GPIO16_CTRL_OFFSET, 0x84 // GPIO16 control offset
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.equ PADS_BANK0_BASE, 0x40038000 // PADS_BANK0 base address
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.equ PADS_BANK0_GPIO16_OFFSET, 0x44 // GPIO16 pad offset
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.equ UART0_BASE, 0x40070000 // UART0 base address
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@@ -0,0 +1,46 @@
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/**
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* FILE: coprocessor.s
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*
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* DESCRIPTION:
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* RP2350 Coprocessor Access Functions.
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*
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* BRIEF:
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* Provides functions to enable coprocessor access control.
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*
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* AUTHOR: Kevin Thomas
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* CREATION DATE: November 27, 2025
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* UPDATE DATE: November 27, 2025
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*/
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.syntax unified // use unified assembly syntax
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.cpu cortex-m33 // target Cortex-M33 core
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.thumb // use Thumb instruction set
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.include "constants.s"
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/**
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* Initialize the .text section.
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* The .text section contains executable code.
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*/
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.section .text // code section
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.align 2 // align to 4-byte boundary
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/**
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* @brief Enable coprocessor access.
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*
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* @details Grants full access to coprocessor 0 via CPACR.
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*
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* @param None
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* @retval None
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*/
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.global Enable_Coprocessor
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.type Enable_Coprocessor , %function
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Enable_Coprocessor:
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ldr r0, =CPACR // load CPACR address
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ldr r1, [r0] // read CPACR value
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orr r1, r1, #(1<<1) // set CP0: Ctrl access priv coproc 0 bit
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orr r1, r1, #(1<<0) // set CP0: Ctrl access priv coproc 0 bit
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str r1, [r0] // store value into CPACR
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dsb // data sync barrier
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isb // instruction sync barrier
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bx lr // return
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@@ -0,0 +1,53 @@
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/**
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* FILE: delay.s
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*
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* DESCRIPTION:
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* RP2350 Delay Functions.
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*
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* BRIEF:
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* Provides millisecond delay functions based on a 14.5MHz clock.
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*
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* AUTHOR: Kevin Thomas
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* CREATION DATE: November 27, 2025
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* UPDATE DATE: November 27, 2025
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*/
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.syntax unified // use unified assembly syntax
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.cpu cortex-m33 // target Cortex-M33 core
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.thumb // use Thumb instruction set
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.include "constants.s"
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/**
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* Initialize the .text section.
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* The .text section contains executable code.
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*/
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.section .text // code section
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.align 2 // align to 4-byte boundary
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/**
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* @brief Delay_MS.
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*
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* @details Delays for r0 milliseconds. Conversion: loop_count = ms * 3600
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* based on a 14.5MHz clock.
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*
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* @param r0 - milliseconds
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* @retval None
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*/
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.global Delay_MS
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.type Delay_MS, %function
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Delay_MS:
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.Delay_MS_Push_Registers:
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push {r4-r12, lr} // push registers r4-r12, lr to the stack
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.Delay_MS_Check:
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cmp r0, #0 // if MS is not valid, return
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ble .Delay_MS_Done // branch if less or equal to 0
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.Delay_MS_Setup:
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ldr r4, =3600 // loops per MS based on 14.5MHz clock
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mul r5, r0, r4 // MS * 3600
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.Delay_MS_Loop:
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subs r5, r5, #1 // decrement counter
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bne .Delay_MS_Loop // branch until zero
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.Delay_MS_Done:
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pop {r4-r12, lr} // pop registers r4-r12, lr from the stack
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bx lr // return
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||||
@@ -0,0 +1,104 @@
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/**
|
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* FILE: gpio.s
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||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 GPIO Functions.
|
||||
*
|
||||
* BRIEF:
|
||||
* Provides GPIO configuration, set, and clear functions using
|
||||
* coprocessor instructions.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
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||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO.
|
||||
*
|
||||
* @details Configures a GPIO pin's pad control and function select.
|
||||
*
|
||||
* @param r0 - PAD_OFFSET
|
||||
* @param r1 - CTRL_OFFSET
|
||||
* @param r2 - GPIO
|
||||
* @retval None
|
||||
*/
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||||
.global GPIO_Config
|
||||
.type GPIO_Config, %function
|
||||
GPIO_Config:
|
||||
.GPIO_Config_Push_Registers:
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push {r4-r12, lr} // push registers r4-r12, lr to the stack
|
||||
.GPIO_Config_Modify_Pad:
|
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ldr r4, =PADS_BANK0_BASE // load PADS_BANK0_BASE address
|
||||
add r4, r4, r0 // PADS_BANK0_BASE + PAD_OFFSET
|
||||
ldr r5, [r4] // read PAD_OFFSET value
|
||||
bic r5, r5, #(1<<7) // clear OD bit
|
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orr r5, r5, #(1<<6) // set IE bit
|
||||
bic r5, r5, #(1<<8) // clear ISO bit
|
||||
str r5, [r4] // store value into PAD_OFFSET
|
||||
.GPIO_Config_Modify_CTRL:
|
||||
ldr r4, =IO_BANK0_BASE // load IO_BANK0 base
|
||||
add r4, r4, r1 // IO_BANK0_BASE + CTRL_OFFSET
|
||||
ldr r5, [r4] // read CTRL_OFFSET value
|
||||
bic r5, r5, #0x1f // clear FUNCSEL
|
||||
orr r5, r5, #0x05 // set FUNCSEL 0x05->SIO_0
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||||
str r5, [r4] // store value into CTRL_OFFSET
|
||||
.GPIO_Config_Enable_OE:
|
||||
ldr r4, =1 // enable output
|
||||
mcrr p0, #4, r2, r4, c4 // gpioc_bit_oe_put(GPIO, 1)
|
||||
.GPIO_Config_Pop_Registers:
|
||||
pop {r4-r12, lr} // pop registers r4-r12, lr to the stack
|
||||
bx lr // return
|
||||
|
||||
/**
|
||||
* @brief GPIO set.
|
||||
*
|
||||
* @details Drives GPIO output high via coprocessor.
|
||||
*
|
||||
* @param r0 - GPIO
|
||||
* @retval None
|
||||
*/
|
||||
.global GPIO_Set
|
||||
.type GPIO_Set, %function
|
||||
GPIO_Set:
|
||||
.GPIO_Set_Push_Registers:
|
||||
push {r4-r12, lr} // push registers r4-r12, lr to the stack
|
||||
.GPIO_Set_Execute:
|
||||
ldr r4, =1 // enable output
|
||||
mcrr p0, #4, r0, r4, c0 // gpioc_bit_out_put(GPIO, 1)
|
||||
.GPIO_Set_Pop_Registers:
|
||||
pop {r4-r12, lr} // pop registers r4-r12, lr from the stack
|
||||
bx lr // return
|
||||
|
||||
/**
|
||||
* @brief GPIO clear.
|
||||
*
|
||||
* @details Drives GPIO output low via coprocessor.
|
||||
*
|
||||
* @param r0 - GPIO
|
||||
* @retval None
|
||||
*/
|
||||
.global GPIO_Clear
|
||||
.type GPIO_Clear, %function
|
||||
GPIO_Clear:
|
||||
.GPIO_Clear_Push_Registers:
|
||||
push {r4-r12, lr} // push registers r4-r12, lr to the stack
|
||||
.GPIO_Clear_Execute:
|
||||
ldr r4, =0 // disable output
|
||||
mcrr p0, #4, r0, r4, c0 // gpioc_bit_out_put(GPIO, 0)
|
||||
.GPIO_Clear_Pop_Registers:
|
||||
pop {r4-r12, lr} // pop registers r4-r12, lr from the stack
|
||||
bx lr // return
|
||||
@@ -0,0 +1,33 @@
|
||||
/**
|
||||
* FILE: image_def.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 IMAGE_DEF Block.
|
||||
*
|
||||
* BRIEF:
|
||||
* A minimum amount of metadata (a valid IMAGE_DEF block) must be embedded in any
|
||||
* binary for the bootrom to recognise it as a valid program image, as opposed to,
|
||||
* for example, blank flash contents or a disconnected flash device. This must
|
||||
* appear within the first 4 kB of a flash image, or anywhere in a RAM or OTP image.
|
||||
* Unlike RP2040, there is no requirement for flash binaries to have a checksummed
|
||||
* "boot2" flash setup function at flash address 0. The RP2350 bootrom performs a
|
||||
* simple best‑effort XIP setup during flash scanning, and a flash‑resident program
|
||||
* can continue executing in this state, or can choose to reconfigure the QSPI
|
||||
* interface at a later time for best performance.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: October 5, 2025
|
||||
* UPDATE DATE: October 5, 2025
|
||||
*/
|
||||
|
||||
.section .picobin_block, "a" // place IMAGE_DEF block in flash
|
||||
|
||||
.word 0xffffded3 // PICOBIN_BLOCK_MARKER_START
|
||||
.byte 0x42 // PICOBIN_BLOCK_ITEM_1BS_IMAGE_TYPE
|
||||
.byte 0x1 // item is 1 word in size
|
||||
.hword 0b0001000000100001 // SECURE mode (0x1021)
|
||||
.byte 0xff // PICOBIN_BLOCK_ITEM_2BS_LAST
|
||||
.hword 0x0001 // item is 1 word in size
|
||||
.byte 0x0 // pad
|
||||
.word 0x0 // relative pointer to next block (0 = loop to self)
|
||||
.word 0xab123579 // PICOBIN_BLOCK_MARKER_END
|
||||
@@ -0,0 +1,91 @@
|
||||
/**
|
||||
* FILE: linker.ld
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 Minimal Linker Script for bare‑metal development.
|
||||
*
|
||||
* BRIEF:
|
||||
* Ensures the boot ROM accepts and runs the image by placing
|
||||
* the IMAGE_DEF block first at 0x10000000, aligning the vector
|
||||
* table to a 128‑byte boundary within the first 4 KB and defining
|
||||
* a non‑secure stack region in SRAM.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: October 5, 2025
|
||||
* UPDATE DATE: October 5, 2025
|
||||
*/
|
||||
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/**
|
||||
* Define memory regions.
|
||||
*/
|
||||
__XIP_BASE = 0x10000000;
|
||||
__XIP_SIZE = 32M;
|
||||
|
||||
__SRAM_BASE = 0x20000000;
|
||||
__SRAM_SIZE = 512K; /* non-secure window */
|
||||
__STACK_SIZE = 32K;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
RAM (rwx) : ORIGIN = __SRAM_BASE, LENGTH = __SRAM_SIZE
|
||||
FLASH (rx) : ORIGIN = __XIP_BASE, LENGTH = __XIP_SIZE
|
||||
}
|
||||
|
||||
/**
|
||||
* Program headers.
|
||||
*/
|
||||
PHDRS
|
||||
{
|
||||
text PT_LOAD FLAGS(5); /* RX */
|
||||
}
|
||||
|
||||
/**
|
||||
* Section placement.
|
||||
*/
|
||||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(FLASH);
|
||||
|
||||
/**
|
||||
* Minimal IMAGE_DEF must be first.
|
||||
*/
|
||||
.embedded_block :
|
||||
{
|
||||
KEEP(*(.embedded_block))
|
||||
} > FLASH :text
|
||||
|
||||
/**
|
||||
* Force the vector table section start to a 128-byte boundary.
|
||||
*/
|
||||
.vectors ALIGN(128) :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
} > FLASH :text
|
||||
|
||||
ASSERT(((ADDR(.vectors) - ORIGIN(FLASH)) < 0x1000),
|
||||
"Vector table must be in first 4KB of flash")
|
||||
|
||||
/**
|
||||
* Text and read-only data.
|
||||
*/
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
KEEP(*(.ARM.attributes))
|
||||
} > FLASH :text
|
||||
|
||||
/**
|
||||
* Non-secure stack symbols.
|
||||
*/
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM); /* 0x20080000 */
|
||||
__StackLimit = __StackTop - __STACK_SIZE;
|
||||
__stack = __StackTop;
|
||||
|
||||
.stack (NOLOAD) : { . = ALIGN(8); } > RAM
|
||||
|
||||
PROVIDE(__Vectors = ADDR(.vectors));
|
||||
}
|
||||
@@ -0,0 +1,66 @@
|
||||
/**
|
||||
* FILE: main.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 Bare-Metal UART Main Application.
|
||||
*
|
||||
* BRIEF:
|
||||
* Main application entry point for RP2350 UART driver. Contains the
|
||||
* main loop that echoes UART input to output.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 2, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Main application entry point.
|
||||
*
|
||||
* @details Implements the infinite echo loop.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global main // export main
|
||||
.type main, %function // mark as function
|
||||
main:
|
||||
.Push_Registers:
|
||||
push {r4-r12, lr} // push registers r4-r12, lr to the stack
|
||||
.Loop:
|
||||
bl UART0_In // call UART0_In
|
||||
bl UART0_Out // call UART0_Out
|
||||
b .Loop // loop forever
|
||||
.Pop_Registers:
|
||||
pop {r4-r12, lr} // pop registers r4-r12, lr from the stack
|
||||
bx lr // return to caller
|
||||
|
||||
/**
|
||||
* Test data and constants.
|
||||
* The .rodata section is used for constants and static data.
|
||||
*/
|
||||
.section .rodata // read-only data section
|
||||
|
||||
/**
|
||||
* Initialized global data.
|
||||
* The .data section is used for initialized global or static variables.
|
||||
*/
|
||||
.section .data // data section
|
||||
|
||||
/**
|
||||
* Uninitialized global data.
|
||||
* The .bss section is used for uninitialized global or static variables.
|
||||
*/
|
||||
.section .bss // BSS section
|
||||
@@ -0,0 +1,50 @@
|
||||
/**
|
||||
* FILE: reset.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 Reset Controller Functions.
|
||||
*
|
||||
* BRIEF:
|
||||
* Provides functions to initialize subsystems by clearing their
|
||||
* reset bits in the Reset controller.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Init subsystem.
|
||||
*
|
||||
* @details Initiates the various subsystems by clearing their reset bits.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global Init_Subsystem
|
||||
.type Init_Subsystem, %function
|
||||
Init_Subsystem:
|
||||
.GPIO_Subsystem_Reset:
|
||||
ldr r0, =RESETS_RESET // load RESETS->RESET address
|
||||
ldr r1, [r0] // read RESETS->RESET value
|
||||
bic r1, r1, #(1<<6) // clear IO_BANK0 bit
|
||||
str r1, [r0] // store value into RESETS->RESET address
|
||||
.GPIO_Subsystem_Reset_Wait:
|
||||
ldr r0, =RESETS_RESET_DONE // load RESETS->RESET_DONE address
|
||||
ldr r1, [r0] // read RESETS->RESET_DONE value
|
||||
tst r1, #(1<<6) // test IO_BANK0 reset done
|
||||
beq .GPIO_Subsystem_Reset_Wait // wait until done
|
||||
bx lr // return
|
||||
@@ -0,0 +1,53 @@
|
||||
/**
|
||||
* FILE: reset_handler.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 Reset Handler.
|
||||
*
|
||||
* BRIEF:
|
||||
* Entry point after reset. Performs initialization sequence including
|
||||
* stack setup, oscillator configuration, subsystem initialization, and
|
||||
* UART setup before branching to main application.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Reset handler for RP2350.
|
||||
*
|
||||
* @details Entry point after reset. Performs:
|
||||
* - Stack initialization
|
||||
* - Coprocessor enable
|
||||
* - GPIO16 pad/function configuration
|
||||
* - Branches to main() which contains the blink loop
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global Reset_Handler // export Reset_Handler symbol
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
bl Init_Stack // initialize MSP/PSP and limits
|
||||
bl Init_XOSC // initialize external crystal oscillator
|
||||
bl Enable_XOSC_Peri_Clock // enable XOSC peripheral clock
|
||||
bl Init_Subsystem // initialize subsystems
|
||||
bl UART_Release_Reset // ensure UART0 out of reset
|
||||
bl UART_Init // initialize UART0 (pins, baud, enable)
|
||||
bl Enable_Coprocessor // enable CP0 coprocessor
|
||||
b main // branch to main loop
|
||||
.size Reset_Handler, . - Reset_Handler
|
||||
@@ -0,0 +1,47 @@
|
||||
/**
|
||||
* FILE: stack.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 Stack Initialization.
|
||||
*
|
||||
* BRIEF:
|
||||
* Provides stack pointer initialization for Main and Process Stack
|
||||
* Pointers (MSP/PSP) and their limits.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Initialize stack pointers.
|
||||
*
|
||||
* @details Sets Main and Process Stack Pointers (MSP/PSP) and their limits.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global Init_Stack
|
||||
.type Init_Stack, %function
|
||||
Init_Stack:
|
||||
ldr r0, =STACK_TOP // load stack top
|
||||
msr PSP, r0 // set PSP
|
||||
ldr r0, =STACK_LIMIT // load stack limit
|
||||
msr MSPLIM, r0 // set MSP limit
|
||||
msr PSPLIM, r0 // set PSP limit
|
||||
ldr r0, =STACK_TOP // reload stack top
|
||||
msr MSP, r0 // set MSP
|
||||
bx lr // return
|
||||
@@ -0,0 +1,149 @@
|
||||
/**
|
||||
* FILE: uart.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 UART Functions.
|
||||
*
|
||||
* BRIEF:
|
||||
* Provides UART initialization, transmit, and receive functions for
|
||||
* UART0 on the RP2350.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Release UART0 from reset and wait until it is ready.
|
||||
*
|
||||
* @details Clears the UART0 reset bit in the Reset controller (RESETS->RESET)
|
||||
* and polls the corresponding bit in RESETS->RESET_DONE until the
|
||||
* UART0 block is no longer in reset. This ensures UART registers are
|
||||
* accessible before configuring the peripheral.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global UART_Release_Reset
|
||||
.type UART_Release_Reset, %function
|
||||
UART_Release_Reset:
|
||||
ldr r0, =RESETS_RESET // load RESETS->RESET address
|
||||
ldr r1, [r0] // read RESETS->RESET value
|
||||
bic r1, r1, #(1<<26) // clear UART0 reset bit
|
||||
str r1, [r0] // write value back to RESETS->RESET
|
||||
.UART_Release_Reset_Wait:
|
||||
ldr r0, =RESETS_RESET_DONE // load RESETS->RESET_DONE address
|
||||
ldr r1, [r0] // read RESETS->RESET_DONE value
|
||||
tst r1, #(1<<26) // test UART0 reset-done bit
|
||||
beq .UART_Release_Reset_Wait // loop until UART0 is out of reset
|
||||
bx lr // return
|
||||
|
||||
/**
|
||||
* @brief Initialize UART0 (pins, baud divisors, line control and enable).
|
||||
*
|
||||
* @details Configures IO_BANK0 pins 0 (TX) and 1 (RX) to the UART function
|
||||
* and programs the corresponding pad controls in PADS_BANK0. It
|
||||
* programs the integer and fractional baud divisors (UARTIBRD and
|
||||
* UARTFBRD), configures UARTLCR_H for 8-bit transfers and FIFOs,
|
||||
* and enables the UART (UARTCR: UARTEN + TXE + RXE).
|
||||
* The routine assumes the UART0 base is available at the
|
||||
* `UART0_BASE` symbol. The selected divisors (IBRD=6, FBRD=33) are
|
||||
* chosen to match the expected peripheral clock; if your UART
|
||||
* peripheral clock differs, adjust these values accordingly.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global UART_Init
|
||||
.type UART_Init, %function
|
||||
UART_Init:
|
||||
ldr r0, =IO_BANK0_BASE // load IO_BANK0 base
|
||||
ldr r1, =2 // FUNCSEL = 2 -> select UART function
|
||||
str r1, [r0, #4] // write FUNCSEL to GPIO0_CTRL (pin0 -> TX)
|
||||
str r1, [r0, #0x0c] // write FUNCSEL to GPIO1_CTRL (pin1 -> RX)
|
||||
ldr r0, =PADS_BANK0_BASE // load PADS_BANK0 base
|
||||
add r0, r0, #0x04 // compute PAD[0] address (PADS + 0x04)
|
||||
ldr r1, =0x04 // pad config value for TX
|
||||
str r1, [r0] // write PAD0 config (TX pad)
|
||||
ldr r0, =PADS_BANK0_BASE // load PADS_BANK0 base again
|
||||
add r0, r0, #0x08 // compute PAD[1] address (PADS + 0x08)
|
||||
ldr r1, =0x40 // pad config value for RX (pulldown/IE)
|
||||
str r1, [r0] // write PAD1 config (RX pad)
|
||||
ldr r0, =UART0_BASE // load UART0 base address
|
||||
ldr r1, =0 // prepare 0 to disable UARTCR
|
||||
str r1, [r0, #0x30] // UARTCR = 0 (disable UART while configuring)
|
||||
ldr r1, =6 // integer baud divisor (IBRD = 6)
|
||||
str r1, [r0, #0x24] // UARTIBRD = 6 (integer baud divisor)
|
||||
ldr r1, =33 // fractional baud divisor (FBRD = 33)
|
||||
str r1, [r0, #0x28] // UARTFBRD = 33 (fractional baud divisor)
|
||||
ldr r1, =112 // UARTLCR_H = 0x70 (FIFO enable + 8-bit)
|
||||
str r1, [r0, #0x2c] // UARTLCR_H = 0x70
|
||||
ldr r1, =3 // RXE/TXE mask
|
||||
lsl r1, r1, #8 // shift RXE/TXE into bit positions 8..9
|
||||
orr r1, r1, #1 // set UARTEN bit (bit 0)
|
||||
str r1, [r0, #0x30] // UARTCR = enable (UARTEN + TXE + RXE)
|
||||
bx lr // return
|
||||
|
||||
/**
|
||||
* @brief UART0 transmit (blocking).
|
||||
*
|
||||
* @details Waits for TX FIFO to be not full, then writes the lowest 8 bits of r0 to UART0.
|
||||
* Data to send must be in r0 on entry.
|
||||
*
|
||||
* @param r0: byte to transmit (lower 8 bits used)
|
||||
* @retval None
|
||||
*/
|
||||
.global UART0_Out
|
||||
.type UART0_Out, %function
|
||||
UART0_Out:
|
||||
.UART0_Out_Push_Registers:
|
||||
push {r4-r12, lr} // push registers r4-r12, lr to the stack
|
||||
.UART0_Out_loop:
|
||||
ldr r4, =UART0_BASE // base address for uart0 registers
|
||||
ldr r5, [r4, #0x18] // read UART0 flag register UARTFR into r5
|
||||
ldr r6, =32 // mask for bit 5, TX FIFO full (TXFF)
|
||||
ands r5, r5, r6 // isolate TXFF bit and set flags
|
||||
bne .UART0_Out_loop // if TX FIFO is full, loop
|
||||
ldr r6, =0xff // mask for the 8 lowest bits
|
||||
ands r0, r0, r6 // mask off upper bits of r0, keep lower 8 bits
|
||||
str r0, [r4, #0] // write data to UARTDR
|
||||
.UART0_Out_Pop_Registers:
|
||||
pop {r4-r12, lr} // pop registers r4-r12, lr from the stack
|
||||
bx lr // return
|
||||
|
||||
/**
|
||||
* @brief UART0 receive (blocking).
|
||||
*
|
||||
* @details Waits for RX FIFO to be not empty, then reads a byte from UART0 into r0.
|
||||
*
|
||||
* @param None
|
||||
* @retval r0: received byte (lower 8 bits valid)
|
||||
*/
|
||||
.global UART0_In
|
||||
.type UART0_In, %function
|
||||
UART0_In:
|
||||
.UART0_In_Push_Registers:
|
||||
push {r4-r12, lr} // push registers r4-r12, lr to the stack
|
||||
.UART0_In_loop:
|
||||
ldr r4, =UART0_BASE // base address for uart0 registers
|
||||
ldr r5, [r4, #0x18] // read UART0 flag register UARTFR into r5
|
||||
ldr r6, =16 // mask for bit 4, RX FIFO empty RXFE
|
||||
ands r5, r5, r6 // isolate RXFE bit and set flags
|
||||
bne .UART0_In_loop // if RX FIFO is empty, loop
|
||||
ldr r0, [r4, #0] // load data from UARTDR into r0
|
||||
.UART0_In_Pop_Registers:
|
||||
pop {r4-r12, lr} // pop registers r4-r12, lr from the stack
|
||||
bx lr // return
|
||||
@@ -0,0 +1,35 @@
|
||||
/**
|
||||
* FILE: vector_table.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 Vector Table.
|
||||
*
|
||||
* BRIEF:
|
||||
* Defines the vector table for the RP2350 containing the initial
|
||||
* stack pointer and reset handler entry point.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .vectors section. The .vectors section contains vector
|
||||
* table and Reset_Handler.
|
||||
*/
|
||||
.section .vectors, "ax" // vector table section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* Vector table section.
|
||||
*/
|
||||
.global _vectors // export _vectors symbol
|
||||
_vectors:
|
||||
.word STACK_TOP // initial stack pointer
|
||||
.word Reset_Handler + 1 // reset handler (Thumb bit set)
|
||||
@@ -0,0 +1,70 @@
|
||||
/**
|
||||
* FILE: xosc.s
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* RP2350 External Crystal Oscillator (XOSC) Functions.
|
||||
*
|
||||
* BRIEF:
|
||||
* Provides functions to initialize the external crystal oscillator
|
||||
* and enable the XOSC peripheral clock.
|
||||
*
|
||||
* AUTHOR: Kevin Thomas
|
||||
* CREATION DATE: November 27, 2025
|
||||
* UPDATE DATE: November 27, 2025
|
||||
*/
|
||||
|
||||
.syntax unified // use unified assembly syntax
|
||||
.cpu cortex-m33 // target Cortex-M33 core
|
||||
.thumb // use Thumb instruction set
|
||||
|
||||
.include "constants.s"
|
||||
|
||||
/**
|
||||
* Initialize the .text section.
|
||||
* The .text section contains executable code.
|
||||
*/
|
||||
.section .text // code section
|
||||
.align 2 // align to 4-byte boundary
|
||||
|
||||
/**
|
||||
* @brief Init XOSC and wait until it is ready.
|
||||
*
|
||||
* @details Configures and initializes the external crystal oscillator (XOSC).
|
||||
* Waits for the XOSC to become stable before returning.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global Init_XOSC
|
||||
.type Init_XOSC, %function
|
||||
Init_XOSC:
|
||||
ldr r0, =XOSC_STARTUP // load XOSC_STARTUP address
|
||||
ldr r1, =0x00c4 // set delay 50,000 cycles
|
||||
str r1, [r0] // store value into XOSC_STARTUP
|
||||
ldr r0, =XOSC_CTRL // load XOSC_CTRL address
|
||||
ldr r1, =0x00FABAA0 // set 1_15MHz, freq range, actual 14.5MHz
|
||||
str r1, [r0] // store value into XOSC_CTRL
|
||||
.Init_XOSC_Wait:
|
||||
ldr r0, =XOSC_STATUS // load XOSC_STATUS address
|
||||
ldr r1, [r0] // read XOSC_STATUS value
|
||||
tst r1, #(1<<31) // test STABLE bit
|
||||
beq .Init_XOSC_Wait // wait until stable bit is set
|
||||
bx lr // return
|
||||
|
||||
/**
|
||||
* @brief Enable XOSC peripheral clock.
|
||||
*
|
||||
* @details Sets the peripheral clock to use XOSC as its AUXSRC.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.global Enable_XOSC_Peri_Clock
|
||||
.type Enable_XOSC_Peri_Clock, %function
|
||||
Enable_XOSC_Peri_Clock:
|
||||
ldr r0, =CLK_PERI_CTRL // load CLK_PERI_CTRL address
|
||||
ldr r1, [r0] // read CLK_PERI_CTRL value
|
||||
orr r1, r1, #(1<<11) // set ENABLE bit
|
||||
orr r1, r1, #(4<<5) // set AUXSRC: XOSC_CLKSRC bit
|
||||
str r1, [r0] // store value into CLK_PERI_CTRL
|
||||
bx lr // return
|
||||
@@ -42,10 +42,10 @@ use rp235x_hal as hal;
|
||||
#[cfg(rp2040)]
|
||||
use rp2040_hal as hal;
|
||||
|
||||
// Timer device type for the HAL timer peripheral
|
||||
/// Timer device type for the HAL timer peripheral.
|
||||
#[cfg(rp2350)]
|
||||
pub(crate) type HalTimer = hal::Timer<hal::timer::CopyableTimer0>;
|
||||
// Timer type alias for RP2040 (non-generic)
|
||||
/// Timer type alias for RP2040 (non-generic).
|
||||
#[cfg(rp2040)]
|
||||
pub(crate) type HalTimer = hal::Timer;
|
||||
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
[build]
|
||||
target = "thumbv8m.main-none-eabihf"
|
||||
|
||||
[target.thumbv6m-none-eabi]
|
||||
linker = "flip-link"
|
||||
rustflags = [
|
||||
"-C", "link-arg=--nmagic",
|
||||
"-C", "link-arg=-Tlink.x",
|
||||
"-C", "link-arg=-Tdefmt.x",
|
||||
"-C", "no-vectorize-loops",
|
||||
]
|
||||
runner = "${PICOTOOL_PATH} load -u -v -x -t elf"
|
||||
|
||||
[target.thumbv8m.main-none-eabihf]
|
||||
rustflags = [
|
||||
"-C", "link-arg=--nmagic",
|
||||
"-C", "link-arg=-Tlink.x",
|
||||
"-C", "link-arg=-Tdefmt.x",
|
||||
"-C", "target-cpu=cortex-m33",
|
||||
]
|
||||
runner = "${PICOTOOL_PATH} load -u -v -x -t elf"
|
||||
|
||||
[target.riscv32imac-unknown-none-elf]
|
||||
rustflags = [
|
||||
"-C", "link-arg=--nmagic",
|
||||
"-C", "link-arg=-Trp2350_riscv.x",
|
||||
"-C", "link-arg=-Tdefmt.x",
|
||||
]
|
||||
runner = "${PICOTOOL_PATH} load -u -v -x -t elf"
|
||||
|
||||
[env]
|
||||
DEFMT_LOG = "debug"
|
||||
@@ -0,0 +1 @@
|
||||
rp2350
|
||||
@@ -0,0 +1,8 @@
|
||||
{
|
||||
"recommendations": [
|
||||
"marus25.cortex-debug",
|
||||
"rust-lang.rust-analyzer",
|
||||
"probe-rs.probe-rs-debugger",
|
||||
"raspberry-pi.raspberry-pi-pico"
|
||||
]
|
||||
}
|
||||
+41
@@ -0,0 +1,41 @@
|
||||
{
|
||||
"version": "0.2.0",
|
||||
"configurations": [
|
||||
{
|
||||
"name": "Pico Debug (probe-rs)",
|
||||
"cwd": "${workspaceFolder}",
|
||||
"request": "launch",
|
||||
"type": "probe-rs-debug",
|
||||
"connectUnderReset": false,
|
||||
"speed": 5000,
|
||||
"runtimeExecutable": "probe-rs",
|
||||
"chip": "${command:raspberry-pi-pico.getChip}",
|
||||
"runtimeArgs": [
|
||||
"dap-server"
|
||||
],
|
||||
"flashingConfig": {
|
||||
"flashingEnabled": true,
|
||||
"haltAfterReset": false
|
||||
},
|
||||
"coreConfigs": [
|
||||
{
|
||||
"coreIndex": 0,
|
||||
"programBinary": "${command:raspberry-pi-pico.launchTargetPath}",
|
||||
"rttEnabled": true,
|
||||
"svdFile": "${command:raspberry-pi-pico.getSVDPath}",
|
||||
"rttChannelFormats": [
|
||||
{
|
||||
"channelNumber": 0,
|
||||
"dataFormat": "Defmt",
|
||||
"mode": "NoBlockSkip",
|
||||
"showTimestamps": true
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"preLaunchTask": "Build + Generate SBOM (debug)",
|
||||
"consoleLogLevel": "Debug",
|
||||
"wireProtocol": "Swd"
|
||||
}
|
||||
]
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
{
|
||||
"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
|
||||
"rust-analyzer.check.allTargets": false,
|
||||
"editor.formatOnSave": true,
|
||||
"files.exclude": {
|
||||
".pico-rs": true
|
||||
}
|
||||
}
|
||||
+124
@@ -0,0 +1,124 @@
|
||||
{
|
||||
"version": "2.0.0",
|
||||
"tasks": [
|
||||
{
|
||||
"label": "Compile Project",
|
||||
"type": "process",
|
||||
"isBuildCommand": true,
|
||||
"command": "cargo",
|
||||
"args": [
|
||||
"build",
|
||||
"--release"
|
||||
],
|
||||
"group": {
|
||||
"kind": "build",
|
||||
"isDefault": true
|
||||
},
|
||||
"presentation": {
|
||||
"reveal": "always",
|
||||
"panel": "dedicated"
|
||||
},
|
||||
"problemMatcher": "$rustc",
|
||||
"options": {
|
||||
"env": {
|
||||
"PICOTOOL_PATH": "${command:raspberry-pi-pico.getPicotoolPath}",
|
||||
"CHIP": "${command:raspberry-pi-pico.getChip}"
|
||||
}
|
||||
}
|
||||
},
|
||||
{
|
||||
"label": "Build + Generate SBOM (release)",
|
||||
"type": "shell",
|
||||
"command": "bash",
|
||||
"args": [
|
||||
"-lc",
|
||||
"cargo sbom > ${command:raspberry-pi-pico.sbomTargetPathRelease}"
|
||||
],
|
||||
"windows": {
|
||||
"command": "powershell",
|
||||
"args": [
|
||||
"-NoProfile",
|
||||
"-ExecutionPolicy",
|
||||
"Bypass",
|
||||
"-Command",
|
||||
"cargo sbom | Set-Content -Encoding utf8 ${command:raspberry-pi-pico.sbomTargetPathRelease}"
|
||||
]
|
||||
},
|
||||
"dependsOn": "Compile Project",
|
||||
"presentation": {
|
||||
"reveal": "silent",
|
||||
"panel": "shared"
|
||||
},
|
||||
"problemMatcher": []
|
||||
},
|
||||
{
|
||||
"label": "Compile Project (debug)",
|
||||
"type": "process",
|
||||
"isBuildCommand": true,
|
||||
"command": "cargo",
|
||||
"args": [
|
||||
"build"
|
||||
],
|
||||
"group": {
|
||||
"kind": "build",
|
||||
"isDefault": false
|
||||
},
|
||||
"presentation": {
|
||||
"reveal": "always",
|
||||
"panel": "dedicated"
|
||||
},
|
||||
"problemMatcher": "$rustc",
|
||||
"options": {
|
||||
"env": {
|
||||
"PICOTOOL_PATH": "${command:raspberry-pi-pico.getPicotoolPath}",
|
||||
"CHIP": "${command:raspberry-pi-pico.getChip}"
|
||||
}
|
||||
}
|
||||
},
|
||||
{
|
||||
"label": "Build + Generate SBOM (debug)",
|
||||
"type": "shell",
|
||||
"command": "bash",
|
||||
"args": [
|
||||
"-lc",
|
||||
"cargo sbom > ${command:raspberry-pi-pico.sbomTargetPathDebug}"
|
||||
],
|
||||
"windows": {
|
||||
"command": "powershell",
|
||||
"args": [
|
||||
"-NoProfile",
|
||||
"-ExecutionPolicy",
|
||||
"Bypass",
|
||||
"-Command",
|
||||
"cargo sbom | Set-Content -Encoding utf8 ${command:raspberry-pi-pico.sbomTargetPathDebug}"
|
||||
]
|
||||
},
|
||||
"dependsOn": "Compile Project (debug)",
|
||||
"presentation": {
|
||||
"reveal": "silent",
|
||||
"panel": "shared"
|
||||
},
|
||||
"problemMatcher": []
|
||||
},
|
||||
{
|
||||
"label": "Run Project",
|
||||
"type": "shell",
|
||||
"dependsOn": [
|
||||
"Build + Generate SBOM (release)"
|
||||
],
|
||||
"command": "${command:raspberry-pi-pico.getPicotoolPath}",
|
||||
"args": [
|
||||
"load",
|
||||
"-x",
|
||||
"${command:raspberry-pi-pico.launchTargetPathRelease}",
|
||||
"-t",
|
||||
"elf"
|
||||
],
|
||||
"presentation": {
|
||||
"reveal": "always",
|
||||
"panel": "dedicated"
|
||||
},
|
||||
"problemMatcher": []
|
||||
}
|
||||
]
|
||||
}
|
||||
Generated
+749
@@ -0,0 +1,749 @@
|
||||
# This file is automatically @generated by Cargo.
|
||||
# It is not intended for manual editing.
|
||||
version = 4
|
||||
|
||||
[[package]]
|
||||
name = "aho-corasick"
|
||||
version = "1.1.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "ddd31a130427c27518df266943a5308ed92d4b226cc639f5a8f1002816174301"
|
||||
dependencies = [
|
||||
"memchr",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "arrayvec"
|
||||
version = "0.7.6"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50"
|
||||
|
||||
[[package]]
|
||||
name = "bare-metal"
|
||||
version = "0.2.5"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "5deb64efa5bd81e31fcd1938615a6d98c82eafcbcd787162b6f63b91d6bac5b3"
|
||||
dependencies = [
|
||||
"rustc_version",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "bitfield"
|
||||
version = "0.13.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719"
|
||||
|
||||
[[package]]
|
||||
name = "bitfield"
|
||||
version = "0.14.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "2d7e60934ceec538daadb9d8432424ed043a904d8e0243f3c6446bce549a46ac"
|
||||
|
||||
[[package]]
|
||||
name = "bitflags"
|
||||
version = "1.3.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a"
|
||||
|
||||
[[package]]
|
||||
name = "byteorder"
|
||||
version = "1.5.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b"
|
||||
|
||||
[[package]]
|
||||
name = "cortex-m"
|
||||
version = "0.7.7"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "8ec610d8f49840a5b376c69663b6369e71f4b34484b9b2eb29fb918d92516cb9"
|
||||
dependencies = [
|
||||
"bare-metal",
|
||||
"bitfield 0.13.2",
|
||||
"embedded-hal 0.2.7",
|
||||
"volatile-register",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "cortex-m-rt"
|
||||
version = "0.7.5"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "801d4dec46b34c299ccf6b036717ae0fce602faa4f4fe816d9013b9a7c9f5ba6"
|
||||
dependencies = [
|
||||
"cortex-m-rt-macros",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "cortex-m-rt-macros"
|
||||
version = "0.7.5"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn 2.0.117",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "crc-any"
|
||||
version = "2.5.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "a62ec9ff5f7965e4d7280bd5482acd20aadb50d632cf6c1d74493856b011fa73"
|
||||
dependencies = [
|
||||
"debug-helper",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "critical-section"
|
||||
version = "1.2.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b"
|
||||
|
||||
[[package]]
|
||||
name = "debug-helper"
|
||||
version = "0.3.13"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "f578e8e2c440e7297e008bb5486a3a8a194775224bbc23729b0dbdfaeebf162e"
|
||||
|
||||
[[package]]
|
||||
name = "defmt"
|
||||
version = "1.0.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "548d977b6da32fa1d1fda2876453da1e7df63ad0304c8b3dae4dbe7b96f39b78"
|
||||
dependencies = [
|
||||
"bitflags",
|
||||
"defmt-macros",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "defmt-macros"
|
||||
version = "1.0.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "3d4fc12a85bcf441cfe44344c4b72d58493178ce635338a3f3b78943aceb258e"
|
||||
dependencies = [
|
||||
"defmt-parser",
|
||||
"proc-macro-error2",
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn 2.0.117",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "defmt-parser"
|
||||
version = "1.0.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "10d60334b3b2e7c9d91ef8150abfb6fa4c1c39ebbcf4a81c2e346aad939fee3e"
|
||||
dependencies = [
|
||||
"thiserror",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "defmt-rtt"
|
||||
version = "1.1.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "93d5a25c99d89c40f5676bec8cefe0614f17f0f40e916f98e345dae941807f9e"
|
||||
dependencies = [
|
||||
"critical-section",
|
||||
"defmt",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "either"
|
||||
version = "1.15.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "48c757948c5ede0e46177b7add2e67155f70e33c07fea8284df6576da70b3719"
|
||||
|
||||
[[package]]
|
||||
name = "embedded-dma"
|
||||
version = "0.2.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "994f7e5b5cb23521c22304927195f236813053eb9c065dd2226a32ba64695446"
|
||||
dependencies = [
|
||||
"stable_deref_trait",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "embedded-hal"
|
||||
version = "0.2.7"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
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"embedded-io",
|
||||
"frunk",
|
||||
"fugit",
|
||||
"gcd",
|
||||
"itertools 0.13.0",
|
||||
"nb 1.1.0",
|
||||
"paste",
|
||||
"pio",
|
||||
"rand_core",
|
||||
"riscv",
|
||||
"riscv-rt",
|
||||
"rp-binary-info",
|
||||
"rp-hal-common",
|
||||
"rp235x-hal-macros",
|
||||
"rp235x-pac",
|
||||
"sha2-const-stable",
|
||||
"usb-device",
|
||||
"vcell",
|
||||
"void",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "rp235x-hal-macros"
|
||||
version = "0.1.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "74edd7a5979e9763bbb98e9746e711bac7464ee3397af7288e6c288ff0d3c764"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn 2.0.117",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "rp235x-pac"
|
||||
version = "0.1.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "5ffcb6931deee4242886b5a1df62db5e2555b0eb6ae1e8be101f3ea3e58e65c6"
|
||||
dependencies = [
|
||||
"cortex-m",
|
||||
"cortex-m-rt",
|
||||
"critical-section",
|
||||
"vcell",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "rustc_version"
|
||||
version = "0.2.3"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "138e3e0acb6c9fb258b19b67cb8abd63c00679d2851805ea151465464fe9030a"
|
||||
dependencies = [
|
||||
"semver",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "semver"
|
||||
version = "0.9.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "1d7eb9ef2c18661902cc47e535f9bc51b78acd254da71d375c2f6720d9a40403"
|
||||
dependencies = [
|
||||
"semver-parser",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "semver-parser"
|
||||
version = "0.7.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
|
||||
|
||||
[[package]]
|
||||
name = "sha2-const-stable"
|
||||
version = "0.1.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "5f179d4e11094a893b82fff208f74d448a7512f99f5a0acbd5c679b705f83ed9"
|
||||
|
||||
[[package]]
|
||||
name = "stable_deref_trait"
|
||||
version = "1.2.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "6ce2be8dc25455e1f91df71bfa12ad37d7af1092ae736f3a6cd0e37bc7810596"
|
||||
|
||||
[[package]]
|
||||
name = "syn"
|
||||
version = "1.0.109"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"unicode-ident",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "syn"
|
||||
version = "2.0.117"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "e665b8803e7b1d2a727f4023456bbbbe74da67099c585258af0ad9c5013b9b99"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"unicode-ident",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "thiserror"
|
||||
version = "2.0.18"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "4288b5bcbc7920c07a1149a35cf9590a2aa808e0bc1eafaade0b80947865fbc4"
|
||||
dependencies = [
|
||||
"thiserror-impl",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "thiserror-impl"
|
||||
version = "2.0.18"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "ebc4ee7f67670e9b64d05fa4253e753e016c6c95ff35b89b7941d6b856dec1d5"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn 2.0.117",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "unicode-ident"
|
||||
version = "1.0.24"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "e6e4313cd5fcd3dad5cafa179702e2b244f760991f45397d14d4ebf38247da75"
|
||||
|
||||
[[package]]
|
||||
name = "usb-device"
|
||||
version = "0.3.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "98816b1accafbb09085168b90f27e93d790b4bfa19d883466b5e53315b5f06a6"
|
||||
dependencies = [
|
||||
"heapless",
|
||||
"portable-atomic",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "vcell"
|
||||
version = "0.1.3"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002"
|
||||
|
||||
[[package]]
|
||||
name = "void"
|
||||
version = "1.0.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
|
||||
|
||||
[[package]]
|
||||
name = "volatile-register"
|
||||
version = "0.2.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "de437e2a6208b014ab52972a27e59b33fa2920d3e00fe05026167a1c509d19cc"
|
||||
dependencies = [
|
||||
"vcell",
|
||||
]
|
||||
@@ -0,0 +1,39 @@
|
||||
[package]
|
||||
edition = "2024"
|
||||
name = "ir"
|
||||
version = "0.1.0"
|
||||
license = "MIT or Apache-2.0"
|
||||
|
||||
[lib]
|
||||
name = "ir_lib"
|
||||
path = "src/lib.rs"
|
||||
|
||||
[[bin]]
|
||||
name = "ir"
|
||||
path = "src/main.rs"
|
||||
|
||||
[build-dependencies]
|
||||
regex = "1.11.0"
|
||||
|
||||
[dependencies]
|
||||
cortex-m = "0.7"
|
||||
cortex-m-rt = "0.7"
|
||||
fugit = "0.3"
|
||||
defmt = "1"
|
||||
defmt-rtt = "1"
|
||||
|
||||
[target.'cfg( target_arch = "arm" )'.dependencies]
|
||||
panic-probe = { version = "1", features = ["print-defmt"] }
|
||||
|
||||
[target.'cfg( target_arch = "riscv32" )'.dependencies]
|
||||
panic-halt = { version = "1.0.0" }
|
||||
|
||||
[target.thumbv6m-none-eabi.dependencies]
|
||||
rp2040-boot2 = "0.3"
|
||||
rp2040-hal = { version = "0.11", features = ["rt", "critical-section-impl"] }
|
||||
|
||||
[target.riscv32imac-unknown-none-elf.dependencies]
|
||||
rp235x-hal = { version = "0.3", features = ["rt", "critical-section-impl"] }
|
||||
|
||||
[target."thumbv8m.main-none-eabihf".dependencies]
|
||||
rp235x-hal = { version = "0.3", features = ["rt", "critical-section-impl"] }
|
||||
@@ -0,0 +1,60 @@
|
||||
//! SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//!
|
||||
//! Copyright (c) 2021-2024 The rp-rs Developers
|
||||
//! Copyright (c) 2021 rp-rs organization
|
||||
//! Copyright (c) 2025 Raspberry Pi Ltd.
|
||||
//!
|
||||
//! Set up linker scripts
|
||||
|
||||
use std::fs::{File, read_to_string};
|
||||
use std::io::Write;
|
||||
use std::path::PathBuf;
|
||||
|
||||
use regex::Regex;
|
||||
|
||||
fn main() {
|
||||
println!("cargo::rustc-check-cfg=cfg(rp2040)");
|
||||
println!("cargo::rustc-check-cfg=cfg(rp2350)");
|
||||
|
||||
let out = PathBuf::from(std::env::var_os("OUT_DIR").unwrap());
|
||||
println!("cargo:rustc-link-search={}", out.display());
|
||||
|
||||
println!("cargo:rerun-if-changed=.pico-rs");
|
||||
let contents = read_to_string(".pico-rs")
|
||||
.map(|s| s.trim().to_string().to_lowercase())
|
||||
.unwrap_or_else(|_| String::new());
|
||||
|
||||
let target;
|
||||
if contents == "rp2040" {
|
||||
target = "thumbv6m-none-eabi";
|
||||
let memory_x = include_bytes!("rp2040.x");
|
||||
let mut file = File::create(out.join("memory.x")).unwrap();
|
||||
file.write_all(memory_x).unwrap();
|
||||
println!("cargo::rustc-cfg=rp2040");
|
||||
println!("cargo:rerun-if-changed=rp2040.x");
|
||||
} else {
|
||||
if contents.contains("riscv") {
|
||||
target = "riscv32imac-unknown-none-elf";
|
||||
} else {
|
||||
target = "thumbv8m.main-none-eabihf";
|
||||
}
|
||||
let memory_x = include_bytes!("rp2350.x");
|
||||
let mut file = File::create(out.join("memory.x")).unwrap();
|
||||
file.write_all(memory_x).unwrap();
|
||||
println!("cargo::rustc-cfg=rp2350");
|
||||
println!("cargo:rerun-if-changed=rp2350.x");
|
||||
}
|
||||
|
||||
let re = Regex::new(r"target = .*").unwrap();
|
||||
let config_toml = include_str!(".cargo/config.toml");
|
||||
let result = re.replace(config_toml, format!("target = \"{}\"", target));
|
||||
let mut file = File::create(".cargo/config.toml").unwrap();
|
||||
file.write_all(result.as_bytes()).unwrap();
|
||||
|
||||
let rp2350_riscv_x = include_bytes!("rp2350_riscv.x");
|
||||
let mut file = File::create(out.join("rp2350_riscv.x")).unwrap();
|
||||
file.write_all(rp2350_riscv_x).unwrap();
|
||||
println!("cargo:rerun-if-changed=rp2350_riscv.x");
|
||||
|
||||
println!("cargo:rerun-if-changed=build.rs");
|
||||
}
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
*
|
||||
* Copyright (c) 2021-2024 The rp-rs Developers
|
||||
* Copyright (c) 2021 rp-rs organization
|
||||
* Copyright (c) 2025 Raspberry Pi Ltd.
|
||||
*/
|
||||
|
||||
MEMORY {
|
||||
BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100
|
||||
FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100
|
||||
RAM : ORIGIN = 0x20000000, LENGTH = 256K
|
||||
SRAM4 : ORIGIN = 0x20040000, LENGTH = 4k
|
||||
SRAM5 : ORIGIN = 0x20041000, LENGTH = 4k
|
||||
}
|
||||
|
||||
EXTERN(BOOT2_FIRMWARE)
|
||||
|
||||
SECTIONS {
|
||||
.boot2 ORIGIN(BOOT2) :
|
||||
{
|
||||
KEEP(*(.boot2));
|
||||
} > BOOT2
|
||||
} INSERT BEFORE .text;
|
||||
|
||||
SECTIONS {
|
||||
.boot_info : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.boot_info));
|
||||
} > FLASH
|
||||
|
||||
} INSERT AFTER .vector_table;
|
||||
|
||||
_stext = ADDR(.boot_info) + SIZEOF(.boot_info);
|
||||
|
||||
SECTIONS {
|
||||
.bi_entries : ALIGN(4)
|
||||
{
|
||||
__bi_entries_start = .;
|
||||
KEEP(*(.bi_entries));
|
||||
. = ALIGN(4);
|
||||
__bi_entries_end = .;
|
||||
} > FLASH
|
||||
} INSERT AFTER .text;
|
||||
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
*
|
||||
* Copyright (c) 2021-2024 The rp-rs Developers
|
||||
* Copyright (c) 2021 rp-rs organization
|
||||
* Copyright (c) 2025 Raspberry Pi Ltd.
|
||||
*/
|
||||
|
||||
MEMORY {
|
||||
FLASH : ORIGIN = 0x10000000, LENGTH = 2048K
|
||||
RAM : ORIGIN = 0x20000000, LENGTH = 512K
|
||||
SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
|
||||
SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
|
||||
}
|
||||
|
||||
SECTIONS {
|
||||
.start_block : ALIGN(4)
|
||||
{
|
||||
__start_block_addr = .;
|
||||
KEEP(*(.start_block));
|
||||
} > FLASH
|
||||
|
||||
} INSERT AFTER .vector_table;
|
||||
|
||||
_stext = ADDR(.start_block) + SIZEOF(.start_block);
|
||||
|
||||
SECTIONS {
|
||||
.bi_entries : ALIGN(4)
|
||||
{
|
||||
__bi_entries_start = .;
|
||||
KEEP(*(.bi_entries));
|
||||
. = ALIGN(4);
|
||||
__bi_entries_end = .;
|
||||
} > FLASH
|
||||
} INSERT AFTER .text;
|
||||
|
||||
SECTIONS {
|
||||
.end_block : ALIGN(4)
|
||||
{
|
||||
__end_block_addr = .;
|
||||
KEEP(*(.end_block));
|
||||
} > FLASH
|
||||
|
||||
} INSERT AFTER .uninit;
|
||||
|
||||
PROVIDE(start_to_end = __end_block_addr - __start_block_addr);
|
||||
PROVIDE(end_to_start = __start_block_addr - __end_block_addr);
|
||||
@@ -0,0 +1,58 @@
|
||||
/*
|
||||
* SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
*
|
||||
* Copyright (c) 2021-2024 The rp-rs Developers
|
||||
* Copyright (c) 2021 rp-rs organization
|
||||
* Copyright (c) 2025 Raspberry Pi Ltd.
|
||||
*/
|
||||
|
||||
MEMORY {
|
||||
FLASH : ORIGIN = 0x10000000, LENGTH = 2048K
|
||||
RAM : ORIGIN = 0x20000000, LENGTH = 512K
|
||||
SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
|
||||
SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
|
||||
}
|
||||
|
||||
PROVIDE(_stext = ORIGIN(FLASH));
|
||||
PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM));
|
||||
PROVIDE(_max_hart_id = 0);
|
||||
PROVIDE(_hart_stack_size = 2K);
|
||||
PROVIDE(_heap_size = 0);
|
||||
|
||||
PROVIDE(InstructionMisaligned = ExceptionHandler);
|
||||
PROVIDE(InstructionFault = ExceptionHandler);
|
||||
PROVIDE(IllegalInstruction = ExceptionHandler);
|
||||
PROVIDE(Breakpoint = ExceptionHandler);
|
||||
PROVIDE(LoadMisaligned = ExceptionHandler);
|
||||
PROVIDE(LoadFault = ExceptionHandler);
|
||||
PROVIDE(StoreMisaligned = ExceptionHandler);
|
||||
PROVIDE(StoreFault = ExceptionHandler);
|
||||
PROVIDE(UserEnvCall = ExceptionHandler);
|
||||
PROVIDE(SupervisorEnvCall = ExceptionHandler);
|
||||
PROVIDE(MachineEnvCall = ExceptionHandler);
|
||||
PROVIDE(InstructionPageFault = ExceptionHandler);
|
||||
PROVIDE(LoadPageFault = ExceptionHandler);
|
||||
PROVIDE(StorePageFault = ExceptionHandler);
|
||||
|
||||
PROVIDE(SupervisorSoft = DefaultHandler);
|
||||
PROVIDE(MachineSoft = DefaultHandler);
|
||||
PROVIDE(SupervisorTimer = DefaultHandler);
|
||||
PROVIDE(MachineTimer = DefaultHandler);
|
||||
PROVIDE(SupervisorExternal = DefaultHandler);
|
||||
PROVIDE(MachineExternal = DefaultHandler);
|
||||
|
||||
PROVIDE(DefaultHandler = DefaultInterruptHandler);
|
||||
PROVIDE(ExceptionHandler = DefaultExceptionHandler);
|
||||
|
||||
PROVIDE(__pre_init = default_pre_init);
|
||||
PROVIDE(_setup_interrupts = default_setup_interrupts);
|
||||
PROVIDE(_mp_hook = default_mp_hook);
|
||||
PROVIDE(_start_trap = default_start_trap);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text.dummy (NOLOAD) :
|
||||
{
|
||||
. = ABSOLUTE(_stext);
|
||||
} > FLASH
|
||||
}
|
||||
@@ -0,0 +1,219 @@
|
||||
//! @file board.rs
|
||||
//! @brief Board-level HAL helpers for the IR driver
|
||||
//! @author Kevin Thomas
|
||||
//! @date 2025
|
||||
//!
|
||||
//! MIT License
|
||||
//!
|
||||
//! Copyright (c) 2025 Kevin Thomas
|
||||
//!
|
||||
//! Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
//! of this software and associated documentation files (the "Software"), to deal
|
||||
//! in the Software without restriction, including without limitation the rights
|
||||
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
//! copies of the Software, and to permit persons to whom the Software is
|
||||
//! furnished to do so, subject to the following conditions:
|
||||
//!
|
||||
//! The above copyright notice and this permission notice shall be included in
|
||||
//! all copies or substantial portions of the Software.
|
||||
//!
|
||||
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
//! SOFTWARE.
|
||||
|
||||
// IR pure-logic functions and timing constants
|
||||
use crate::ir;
|
||||
// Rate extension trait for .Hz() baud rate construction
|
||||
use fugit::RateExtU32;
|
||||
// Clock trait for accessing system clock frequency
|
||||
use hal::Clock;
|
||||
// GPIO pin types and function selectors
|
||||
use hal::gpio::{FunctionNull, FunctionUart, Pin, PullDown, PullNone};
|
||||
// UART configuration and peripheral types
|
||||
use hal::uart::{DataBits, Enabled, StopBits, UartConfig, UartPeripheral};
|
||||
|
||||
// Alias our HAL crate
|
||||
#[cfg(rp2350)]
|
||||
use rp235x_hal as hal;
|
||||
#[cfg(rp2040)]
|
||||
use rp2040_hal as hal;
|
||||
|
||||
/// Timer device type for the HAL timer peripheral.
|
||||
#[cfg(rp2350)]
|
||||
pub(crate) type HalTimer = hal::Timer<hal::timer::CopyableTimer0>;
|
||||
/// Timer type alias for RP2040 (non-generic).
|
||||
#[cfg(rp2040)]
|
||||
pub(crate) type HalTimer = hal::Timer;
|
||||
|
||||
/// External crystal frequency in Hz (12 MHz).
|
||||
pub(crate) const XTAL_FREQ_HZ: u32 = 12_000_000u32;
|
||||
|
||||
/// UART baud rate in bits per second.
|
||||
pub(crate) const UART_BAUD: u32 = 115_200;
|
||||
|
||||
/// GPIO pin number connected to the IR receiver output.
|
||||
pub(crate) const IR_GPIO: u8 = 5;
|
||||
|
||||
/// Delay between decode attempts in milliseconds.
|
||||
pub(crate) const POLL_MS: u32 = 10;
|
||||
|
||||
/// Type alias for the configured TX pin (GPIO 0, UART function, no pull).
|
||||
pub(crate) type TxPin = Pin<hal::gpio::bank0::Gpio0, FunctionUart, PullNone>;
|
||||
|
||||
/// Type alias for the configured RX pin (GPIO 1, UART function, no pull).
|
||||
pub(crate) type RxPin = Pin<hal::gpio::bank0::Gpio1, FunctionUart, PullNone>;
|
||||
|
||||
/// Type alias for the default TX pin state from `Pins::new()`.
|
||||
pub(crate) type TxPinDefault = Pin<hal::gpio::bank0::Gpio0, FunctionNull, PullDown>;
|
||||
|
||||
/// Type alias for the default RX pin state from `Pins::new()`.
|
||||
pub(crate) type RxPinDefault = Pin<hal::gpio::bank0::Gpio1, FunctionNull, PullDown>;
|
||||
|
||||
/// Type alias for the fully-enabled UART0 peripheral with TX/RX pins.
|
||||
pub(crate) type EnabledUart = UartPeripheral<Enabled, hal::pac::UART0, (TxPin, RxPin)>;
|
||||
|
||||
/// Initialise system clocks and PLLs from the external 12 MHz crystal.
|
||||
pub(crate) fn init_clocks(
|
||||
xosc: hal::pac::XOSC,
|
||||
clocks: hal::pac::CLOCKS,
|
||||
pll_sys: hal::pac::PLL_SYS,
|
||||
pll_usb: hal::pac::PLL_USB,
|
||||
resets: &mut hal::pac::RESETS,
|
||||
watchdog: &mut hal::Watchdog,
|
||||
) -> hal::clocks::ClocksManager {
|
||||
hal::clocks::init_clocks_and_plls(
|
||||
XTAL_FREQ_HZ, xosc, clocks, pll_sys, pll_usb, resets, watchdog,
|
||||
)
|
||||
.unwrap()
|
||||
}
|
||||
|
||||
/// Unlock the GPIO bank and return the pin set.
|
||||
pub(crate) fn init_pins(
|
||||
io_bank0: hal::pac::IO_BANK0,
|
||||
pads_bank0: hal::pac::PADS_BANK0,
|
||||
sio: hal::pac::SIO,
|
||||
resets: &mut hal::pac::RESETS,
|
||||
) -> hal::gpio::Pins {
|
||||
let sio = hal::Sio::new(sio);
|
||||
hal::gpio::Pins::new(io_bank0, pads_bank0, sio.gpio_bank0, resets)
|
||||
}
|
||||
|
||||
/// Initialise UART0 for serial output.
|
||||
pub(crate) fn init_uart(
|
||||
uart0: hal::pac::UART0,
|
||||
tx_pin: TxPinDefault,
|
||||
rx_pin: RxPinDefault,
|
||||
resets: &mut hal::pac::RESETS,
|
||||
clocks: &hal::clocks::ClocksManager,
|
||||
) -> EnabledUart {
|
||||
let pins = (
|
||||
tx_pin.reconfigure::<FunctionUart, PullNone>(),
|
||||
rx_pin.reconfigure::<FunctionUart, PullNone>(),
|
||||
);
|
||||
let cfg = UartConfig::new(UART_BAUD.Hz(), DataBits::Eight, None, StopBits::One);
|
||||
UartPeripheral::new(uart0, pins, resets)
|
||||
.enable(cfg, clocks.peripheral_clock.freq())
|
||||
.unwrap()
|
||||
}
|
||||
|
||||
/// Create a blocking delay timer from the ARM SysTick peripheral.
|
||||
pub(crate) fn init_delay(clocks: &hal::clocks::ClocksManager) -> cortex_m::delay::Delay {
|
||||
let core = cortex_m::Peripherals::take().unwrap();
|
||||
cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().to_Hz())
|
||||
}
|
||||
|
||||
/// Read the free-running microsecond timer (lower 32 bits).
|
||||
fn time_us_32(timer: &HalTimer) -> u32 {
|
||||
timer.get_counter().ticks() as u32
|
||||
}
|
||||
|
||||
/// Read the current logic level of the IR input pin through the SIO block.
|
||||
fn gpio_read() -> bool {
|
||||
unsafe { (*hal::pac::SIO::PTR).gpio_in().read().bits() & (1u32 << IR_GPIO) != 0 }
|
||||
}
|
||||
|
||||
/// Wait for the IR pin to reach the requested level or time out.
|
||||
fn wait_for_level(timer: &HalTimer, level: bool, timeout_us: u32) -> Option<i64> {
|
||||
let start = time_us_32(timer);
|
||||
while gpio_read() != level {
|
||||
let elapsed = time_us_32(timer).wrapping_sub(start) as i64;
|
||||
if elapsed > timeout_us as i64 {
|
||||
return None;
|
||||
}
|
||||
}
|
||||
Some(time_us_32(timer).wrapping_sub(start) as i64)
|
||||
}
|
||||
|
||||
/// Wait for the NEC leader burst and space.
|
||||
fn wait_leader(timer: &HalTimer) -> bool {
|
||||
if wait_for_level(timer, false, ir::LEADER_START_TIMEOUT_US).is_none() {
|
||||
return false;
|
||||
}
|
||||
let Some(mark_width) = wait_for_level(timer, true, ir::LEADER_MARK_TIMEOUT_US) else {
|
||||
return false;
|
||||
};
|
||||
if !ir::is_valid_leader_mark(mark_width) {
|
||||
return false;
|
||||
}
|
||||
let Some(space_width) = wait_for_level(timer, false, ir::LEADER_SPACE_TIMEOUT_US) else {
|
||||
return false;
|
||||
};
|
||||
ir::is_valid_leader_space(space_width)
|
||||
}
|
||||
|
||||
/// Read one NEC bit and store it in the frame buffer.
|
||||
fn read_nec_bit(timer: &HalTimer, data: &mut [u8; 4], bit_index: usize) -> bool {
|
||||
if wait_for_level(timer, true, ir::BIT_MARK_TIMEOUT_US).is_none() {
|
||||
return false;
|
||||
}
|
||||
let Some(space_width) = wait_for_level(timer, false, ir::BIT_SPACE_TIMEOUT_US) else {
|
||||
return false;
|
||||
};
|
||||
if !ir::is_valid_bit_space(space_width) {
|
||||
return false;
|
||||
}
|
||||
ir::accumulate_nec_bit(data, bit_index, space_width);
|
||||
true
|
||||
}
|
||||
|
||||
/// Read a full 32-bit NEC frame.
|
||||
fn read_32_bits(timer: &HalTimer, data: &mut [u8; 4]) -> bool {
|
||||
let mut bit_index = 0usize;
|
||||
while bit_index < ir::FRAME_BITS {
|
||||
if !read_nec_bit(timer, data, bit_index) {
|
||||
return false;
|
||||
}
|
||||
bit_index += 1;
|
||||
}
|
||||
true
|
||||
}
|
||||
|
||||
/// Block until an NEC key is decoded or return `None` on failure.
|
||||
pub(crate) fn ir_getkey(timer: &HalTimer) -> Option<u8> {
|
||||
if !wait_leader(timer) {
|
||||
return None;
|
||||
}
|
||||
let mut data = [0u8; 4];
|
||||
if !read_32_bits(timer, &mut data) {
|
||||
return None;
|
||||
}
|
||||
ir::validate_nec_frame(&data)
|
||||
}
|
||||
|
||||
/// Poll the decoder and print the key code when a valid frame is received.
|
||||
pub(crate) fn poll_receiver(
|
||||
uart: &EnabledUart,
|
||||
timer: &HalTimer,
|
||||
delay: &mut cortex_m::delay::Delay,
|
||||
) {
|
||||
let mut buf = [0u8; 26];
|
||||
if let Some(command) = ir_getkey(timer) {
|
||||
let len = ir::format_command(&mut buf, command);
|
||||
uart.write_full_blocking(&buf[..len]);
|
||||
}
|
||||
delay.delay_ms(POLL_MS);
|
||||
}
|
||||
@@ -0,0 +1,239 @@
|
||||
//! @file ir.rs
|
||||
//! @brief Implementation of the NEC IR receiver decoder driver
|
||||
//! @author Kevin Thomas
|
||||
//! @date 2025
|
||||
//!
|
||||
//! MIT License
|
||||
//!
|
||||
//! Copyright (c) 2025 Kevin Thomas
|
||||
//!
|
||||
//! Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
//! of this software and associated documentation files (the "Software"), to deal
|
||||
//! in the Software without restriction, including without limitation the rights
|
||||
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
//! copies of the Software, and to permit persons to whom the Software is
|
||||
//! furnished to do so, subject to the following conditions:
|
||||
//!
|
||||
//! The above copyright notice and this permission notice shall be included in
|
||||
//! all copies or substantial portions of the Software.
|
||||
//!
|
||||
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
//! SOFTWARE.
|
||||
|
||||
/// Leader wait timeout in microseconds.
|
||||
pub const LEADER_START_TIMEOUT_US: u32 = 150_000;
|
||||
|
||||
/// Maximum duration accepted for the NEC leader mark wait.
|
||||
pub const LEADER_MARK_TIMEOUT_US: u32 = 12_000;
|
||||
|
||||
/// Minimum valid NEC leader mark width in microseconds.
|
||||
pub const LEADER_MARK_MIN_US: i64 = 8_000;
|
||||
|
||||
/// Maximum valid NEC leader mark width in microseconds.
|
||||
pub const LEADER_MARK_MAX_US: i64 = 10_000;
|
||||
|
||||
/// Maximum duration accepted for the NEC leader space wait.
|
||||
pub const LEADER_SPACE_TIMEOUT_US: u32 = 7_000;
|
||||
|
||||
/// Minimum valid NEC leader space width in microseconds.
|
||||
pub const LEADER_SPACE_MIN_US: i64 = 3_500;
|
||||
|
||||
/// Maximum valid NEC leader space width in microseconds.
|
||||
pub const LEADER_SPACE_MAX_US: i64 = 5_000;
|
||||
|
||||
/// Maximum duration accepted while waiting for the bit mark to end.
|
||||
pub const BIT_MARK_TIMEOUT_US: u32 = 1_000;
|
||||
|
||||
/// Maximum duration accepted while measuring the data space.
|
||||
pub const BIT_SPACE_TIMEOUT_US: u32 = 2_500;
|
||||
|
||||
/// Minimum valid data space width in microseconds.
|
||||
pub const BIT_SPACE_MIN_US: i64 = 200;
|
||||
|
||||
/// Space width above which a NEC bit is interpreted as logical 1.
|
||||
pub const BIT_ONE_THRESHOLD_US: i64 = 1_200;
|
||||
|
||||
/// Total number of bits in an NEC frame.
|
||||
pub const FRAME_BITS: usize = 32;
|
||||
|
||||
/// Return true if the measured NEC leader mark width is valid.
|
||||
pub fn is_valid_leader_mark(duration_us: i64) -> bool {
|
||||
(LEADER_MARK_MIN_US..=LEADER_MARK_MAX_US).contains(&duration_us)
|
||||
}
|
||||
|
||||
/// Return true if the measured NEC leader space width is valid.
|
||||
pub fn is_valid_leader_space(duration_us: i64) -> bool {
|
||||
(LEADER_SPACE_MIN_US..=LEADER_SPACE_MAX_US).contains(&duration_us)
|
||||
}
|
||||
|
||||
/// Return true if the measured NEC bit space width is valid.
|
||||
pub fn is_valid_bit_space(duration_us: i64) -> bool {
|
||||
duration_us >= BIT_SPACE_MIN_US
|
||||
}
|
||||
|
||||
/// Accumulate a single NEC bit into the 4-byte frame buffer.
|
||||
///
|
||||
/// Matches the C implementation exactly: bytes are filled LSB-first.
|
||||
pub fn accumulate_nec_bit(data: &mut [u8; 4], bit_index: usize, duration_us: i64) {
|
||||
let byte_idx = bit_index / 8;
|
||||
let bit_idx = bit_index % 8;
|
||||
if duration_us > BIT_ONE_THRESHOLD_US {
|
||||
data[byte_idx] |= 1u8 << bit_idx;
|
||||
}
|
||||
}
|
||||
|
||||
/// Validate an NEC frame and return the command byte on success.
|
||||
pub fn validate_nec_frame(data: &[u8; 4]) -> Option<u8> {
|
||||
if data[0].wrapping_add(data[1]) == 0xFF && data[2].wrapping_add(data[3]) == 0xFF {
|
||||
Some(data[2])
|
||||
} else {
|
||||
None
|
||||
}
|
||||
}
|
||||
|
||||
/// Format the decoded command as hexadecimal and decimal followed by CRLF.
|
||||
pub fn format_command(buf: &mut [u8], command: u8) -> usize {
|
||||
let mut pos = 0;
|
||||
let prefix = b"NEC command: 0x";
|
||||
buf[pos..pos + prefix.len()].copy_from_slice(prefix);
|
||||
pos += prefix.len();
|
||||
pos += format_hex_u8(buf, pos, command);
|
||||
let middle = b" (";
|
||||
buf[pos..pos + middle.len()].copy_from_slice(middle);
|
||||
pos += middle.len();
|
||||
pos += format_u8(buf, pos, command);
|
||||
buf[pos] = b')';
|
||||
pos += 1;
|
||||
buf[pos] = b'\r';
|
||||
pos += 1;
|
||||
buf[pos] = b'\n';
|
||||
pos += 1;
|
||||
pos
|
||||
}
|
||||
|
||||
/// Format an unsigned 8-bit integer at the given buffer offset.
|
||||
fn format_u8(buf: &mut [u8], pos: usize, value: u8) -> usize {
|
||||
if value >= 100 {
|
||||
buf[pos] = b'0' + value / 100;
|
||||
buf[pos + 1] = b'0' + (value / 10) % 10;
|
||||
buf[pos + 2] = b'0' + value % 10;
|
||||
3
|
||||
} else if value >= 10 {
|
||||
buf[pos] = b'0' + value / 10;
|
||||
buf[pos + 1] = b'0' + value % 10;
|
||||
2
|
||||
} else {
|
||||
buf[pos] = b'0' + value;
|
||||
1
|
||||
}
|
||||
}
|
||||
|
||||
/// Format an unsigned 8-bit integer as two uppercase hexadecimal digits.
|
||||
fn format_hex_u8(buf: &mut [u8], pos: usize, value: u8) -> usize {
|
||||
buf[pos] = hex_digit((value >> 4) & 0x0F);
|
||||
buf[pos + 1] = hex_digit(value & 0x0F);
|
||||
2
|
||||
}
|
||||
|
||||
/// Convert a 4-bit value to its uppercase ASCII hex digit.
|
||||
fn hex_digit(value: u8) -> u8 {
|
||||
if value < 10 {
|
||||
b'0' + value
|
||||
} else {
|
||||
b'A' + (value - 10)
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
// Import all parent module items
|
||||
use super::*;
|
||||
|
||||
#[test]
|
||||
fn leader_mark_accepts_lower_bound() {
|
||||
assert!(is_valid_leader_mark(8_000));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn leader_mark_rejects_below_lower_bound() {
|
||||
assert!(!is_valid_leader_mark(7_999));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn leader_space_accepts_upper_bound() {
|
||||
assert!(is_valid_leader_space(5_000));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn leader_space_rejects_above_upper_bound() {
|
||||
assert!(!is_valid_leader_space(5_001));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn bit_space_rejects_short_pulse() {
|
||||
assert!(!is_valid_bit_space(199));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn bit_space_accepts_threshold() {
|
||||
assert!(is_valid_bit_space(200));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn accumulate_zero_bit_leaves_byte_clear() {
|
||||
let mut data = [0u8; 4];
|
||||
accumulate_nec_bit(&mut data, 0, 800);
|
||||
assert_eq!(data[0], 0);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn accumulate_one_bit_sets_lsb() {
|
||||
let mut data = [0u8; 4];
|
||||
accumulate_nec_bit(&mut data, 0, 1_300);
|
||||
assert_eq!(data[0], 1);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn accumulate_crosses_into_next_byte() {
|
||||
let mut data = [0u8; 4];
|
||||
accumulate_nec_bit(&mut data, 8, 1_300);
|
||||
assert_eq!(data[0], 0);
|
||||
assert_eq!(data[1], 1);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn validate_frame_returns_command() {
|
||||
let data = [0x00, 0xFF, 0x45, 0xBA];
|
||||
assert_eq!(validate_nec_frame(&data), Some(0x45));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn validate_frame_rejects_bad_inverse() {
|
||||
let data = [0x00, 0xFE, 0x45, 0xBA];
|
||||
assert_eq!(validate_nec_frame(&data), None);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn format_command_single_digit() {
|
||||
let mut buf = [0u8; 24];
|
||||
let n = format_command(&mut buf, 7);
|
||||
assert_eq!(&buf[..n], b"NEC command: 0x07 (7)\r\n");
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn format_command_three_digits() {
|
||||
let mut buf = [0u8; 26];
|
||||
let n = format_command(&mut buf, 255);
|
||||
assert_eq!(&buf[..n], b"NEC command: 0xFF (255)\r\n");
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn format_hex_digit_alpha() {
|
||||
assert_eq!(hex_digit(0x0A), b'A');
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,9 @@
|
||||
//! @file lib.rs
|
||||
//! @brief Library root for the IR driver crate
|
||||
//! @author Kevin Thomas
|
||||
//! @date 2025
|
||||
|
||||
#![no_std]
|
||||
|
||||
// IR driver module
|
||||
pub mod ir;
|
||||
@@ -0,0 +1,113 @@
|
||||
//! @file main.rs
|
||||
//! @brief NEC IR receiver demonstration
|
||||
//! @author Kevin Thomas
|
||||
//! @date 2025
|
||||
//!
|
||||
//! MIT License
|
||||
//!
|
||||
//! Copyright (c) 2025 Kevin Thomas
|
||||
//!
|
||||
//! Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
//! of this software and associated documentation files (the "Software"), to deal
|
||||
//! in the Software without restriction, including without limitation the rights
|
||||
//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
//! copies of the Software, and to permit persons to whom the Software is
|
||||
//! furnished to do so, subject to the following conditions:
|
||||
//!
|
||||
//! The above copyright notice and this permission notice shall be included in
|
||||
//! all copies or substantial portions of the Software.
|
||||
//!
|
||||
//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
//! SOFTWARE.
|
||||
//!
|
||||
//! -----------------------------------------------------------------------------
|
||||
//!
|
||||
//! Demonstrates NEC IR receiver decoding using the ir.rs driver. The receiver
|
||||
//! output is monitored on GPIO5 with an internal pull-up enabled, and each
|
||||
//! successfully decoded command byte is printed over UART. Failed decodes are
|
||||
//! ignored, matching the original C demo behavior.
|
||||
//!
|
||||
//! Wiring:
|
||||
//! GPIO5 -> IR receiver OUT
|
||||
//! 3.3V -> IR receiver VCC
|
||||
//! GND -> IR receiver GND
|
||||
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
// Board-level helpers: constants, type aliases, and init functions
|
||||
mod board;
|
||||
// IR driver module — suppress warnings for unused public API functions
|
||||
#[allow(dead_code)]
|
||||
mod ir;
|
||||
|
||||
// Debugging output over RTT
|
||||
use defmt_rtt as _;
|
||||
// Panic handler for RISC-V targets
|
||||
#[cfg(target_arch = "riscv32")]
|
||||
use panic_halt as _;
|
||||
// Panic handler for ARM targets
|
||||
#[cfg(target_arch = "arm")]
|
||||
use panic_probe as _;
|
||||
|
||||
// HAL entry-point macro
|
||||
use hal::entry;
|
||||
|
||||
// Alias our HAL crate
|
||||
#[cfg(rp2350)]
|
||||
use rp235x_hal as hal;
|
||||
#[cfg(rp2040)]
|
||||
use rp2040_hal as hal;
|
||||
|
||||
// Second-stage boot loader for RP2040
|
||||
#[unsafe(link_section = ".boot2")]
|
||||
#[used]
|
||||
#[cfg(rp2040)]
|
||||
pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_W25Q080;
|
||||
|
||||
// Boot metadata for the RP2350 Boot ROM
|
||||
#[unsafe(link_section = ".start_block")]
|
||||
#[used]
|
||||
#[cfg(rp2350)]
|
||||
pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
|
||||
|
||||
/// Application entry point for the NEC IR receiver demo.
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let mut pac = hal::pac::Peripherals::take().unwrap();
|
||||
let clocks = board::init_clocks(
|
||||
pac.XOSC, pac.CLOCKS, pac.PLL_SYS, pac.PLL_USB, &mut pac.RESETS,
|
||||
&mut hal::Watchdog::new(pac.WATCHDOG),
|
||||
);
|
||||
let pins = board::init_pins(pac.IO_BANK0, pac.PADS_BANK0, pac.SIO, &mut pac.RESETS);
|
||||
let uart = board::init_uart(pac.UART0, pins.gpio0, pins.gpio1, &mut pac.RESETS, &clocks);
|
||||
let mut delay = board::init_delay(&clocks);
|
||||
#[cfg(rp2350)]
|
||||
let timer = hal::Timer::new_timer0(pac.TIMER0, &mut pac.RESETS, &clocks);
|
||||
#[cfg(rp2040)]
|
||||
let timer = hal::Timer::new(pac.TIMER, &mut pac.RESETS);
|
||||
let _ir_pin = pins.gpio5.into_pull_up_input();
|
||||
uart.write_full_blocking(b"NEC IR driver initialized on GPIO 5\r\n");
|
||||
uart.write_full_blocking(b"Press a button on your NEC remote...\r\n");
|
||||
loop {
|
||||
board::poll_receiver(&uart, &timer, &mut delay);
|
||||
}
|
||||
}
|
||||
|
||||
// Picotool binary info metadata
|
||||
#[unsafe(link_section = ".bi_entries")]
|
||||
#[used]
|
||||
pub static PICOTOOL_ENTRIES: [hal::binary_info::EntryAddr; 5] = [
|
||||
hal::binary_info::rp_cargo_bin_name!(),
|
||||
hal::binary_info::rp_cargo_version!(),
|
||||
hal::binary_info::rp_program_description!(c"NEC IR Receiver Demo"),
|
||||
hal::binary_info::rp_cargo_homepage_url!(),
|
||||
hal::binary_info::rp_program_build_attribute!(),
|
||||
];
|
||||
|
||||
// End of file
|
||||
@@ -0,0 +1 @@
|
||||
{"rustc_fingerprint":3018370877978686052,"outputs":{"5409910182631311548":{"success":true,"status":"","code":0,"stdout":"rustc 1.91.1 (ed61e7d7e 2025-11-07)\nbinary: rustc\ncommit-hash: ed61e7d7e242494fb7057f2657300d9e77bb4fcb\ncommit-date: 2025-11-07\nhost: x86_64-pc-windows-msvc\nrelease: 1.91.1\nLLVM version: 21.1.2\n","stderr":""},"6257262133114560740":{"success":true,"status":"","code":0,"stdout":"___.exe\nlib___.rlib\n___.dll\n___.dll\n___.lib\n___.dll\nC:\\Users\\assem.KEVINTHOMAS\\.rustup\\toolchains\\stable-x86_64-pc-windows-msvc\npacked\n___\ndebug_assertions\npanic=\"unwind\"\nproc_macro\ntarget_abi=\"\"\ntarget_arch=\"x86_64\"\ntarget_endian=\"little\"\ntarget_env=\"msvc\"\ntarget_family=\"windows\"\ntarget_feature=\"cmpxchg16b\"\ntarget_feature=\"fxsr\"\ntarget_feature=\"sse\"\ntarget_feature=\"sse2\"\ntarget_feature=\"sse3\"\ntarget_has_atomic=\"128\"\ntarget_has_atomic=\"16\"\ntarget_has_atomic=\"32\"\ntarget_has_atomic=\"64\"\ntarget_has_atomic=\"8\"\ntarget_has_atomic=\"ptr\"\ntarget_os=\"windows\"\ntarget_pointer_width=\"64\"\ntarget_vendor=\"pc\"\nwindows\n","stderr":""},"692057488268926967":{"success":true,"status":"","code":0,"stdout":"___.exe\nlib___.rlib\n___.dll\n___.dll\n___.lib\n___.dll\nC:\\Users\\assem.KEVINTHOMAS\\.rustup\\toolchains\\stable-x86_64-pc-windows-msvc\npacked\n___\ndebug_assertions\npanic=\"unwind\"\nproc_macro\ntarget_abi=\"\"\ntarget_arch=\"x86_64\"\ntarget_endian=\"little\"\ntarget_env=\"msvc\"\ntarget_family=\"windows\"\ntarget_feature=\"cmpxchg16b\"\ntarget_feature=\"fxsr\"\ntarget_feature=\"sse\"\ntarget_feature=\"sse2\"\ntarget_feature=\"sse3\"\ntarget_has_atomic=\"128\"\ntarget_has_atomic=\"16\"\ntarget_has_atomic=\"32\"\ntarget_has_atomic=\"64\"\ntarget_has_atomic=\"8\"\ntarget_has_atomic=\"ptr\"\ntarget_os=\"windows\"\ntarget_pointer_width=\"64\"\ntarget_vendor=\"pc\"\nwindows\n","stderr":""},"7671865365644980443":{"success":true,"status":"","code":0,"stdout":"___\nlib___.rlib\nlib___.a\nC:\\Users\\assem.KEVINTHOMAS\\.rustup\\toolchains\\stable-x86_64-pc-windows-msvc\noff\n___\ndebug_assertions\npanic=\"abort\"\nproc_macro\ntarget_abi=\"eabihf\"\ntarget_arch=\"arm\"\ntarget_endian=\"little\"\ntarget_env=\"\"\ntarget_has_atomic=\"16\"\ntarget_has_atomic=\"32\"\ntarget_has_atomic=\"8\"\ntarget_has_atomic=\"ptr\"\ntarget_os=\"none\"\ntarget_pointer_width=\"32\"\ntarget_vendor=\"unknown\"\n","stderr":"warning: dropping unsupported crate type `dylib` for target `thumbv8m.main-none-eabihf`\n\nwarning: dropping unsupported crate type `cdylib` for target `thumbv8m.main-none-eabihf`\n\nwarning: dropping unsupported crate type `proc-macro` for target `thumbv8m.main-none-eabihf`\n\nwarning: 3 warnings emitted\n\n"}},"successes":{}}
|
||||
@@ -0,0 +1,3 @@
|
||||
Signature: 8a477f597d28d172789f06886806bc55
|
||||
# This file is a cache directory tag created by cargo.
|
||||
# For information about cache directory tags see https://bford.info/cachedir/
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||||
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This file has an mtime of when this was started.
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This file has an mtime of when this was started.
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user