mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
synced 2026-04-06 11:22:26 +02:00
Add 0x04_pwm_cbm: bare-metal RP2350 PWM driver
- PWM slice 4, channel B on GPIO25 (onboard LED) - Duty cycle sweep 0-100% in 5% steps for breathing effect - Wrap 9999 with no clock division (~650 Hz from ROSC) - UART reports each duty step - 1390B FLASH, 11 source files, zero warnings
This commit is contained in:
45
drivers/0x04_pwm_cbm/.vscode/c_cpp_properties.json
vendored
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45
drivers/0x04_pwm_cbm/.vscode/c_cpp_properties.json
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@@ -0,0 +1,45 @@
|
||||
{
|
||||
"configurations": [
|
||||
{
|
||||
"name": "ARM GCC",
|
||||
"includePath": [
|
||||
"${workspaceFolder}/Inc/**"
|
||||
],
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||||
"defines": [
|
||||
"__GNUC__",
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||||
"__ARM_ARCH_8M_MAIN__",
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||||
"__ARMCC_VERSION"
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||||
],
|
||||
"compilerPath": "${userHome}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gcc",
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||||
"compileCommands": "${workspaceFolder}/compile_commands.json",
|
||||
"cStandard": "c11",
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||||
"cppStandard": "c++17",
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||||
"intelliSenseMode": "gcc-arm",
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||||
"compilerArgs": [
|
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"-mcpu=cortex-m33",
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"-mthumb"
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||||
]
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||||
},
|
||||
{
|
||||
"name": "ARM GCC (Windows)",
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||||
"includePath": [
|
||||
"${workspaceFolder}/Inc/**"
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||||
],
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||||
"defines": [
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||||
"__GNUC__",
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||||
"__ARM_ARCH_8M_MAIN__",
|
||||
"__ARMCC_VERSION"
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||||
],
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||||
"compilerPath": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gcc.exe",
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||||
"compileCommands": "${workspaceFolder}/compile_commands.json",
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||||
"cStandard": "c11",
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||||
"cppStandard": "c++17",
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||||
"intelliSenseMode": "gcc-arm",
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"compilerArgs": [
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"-mcpu=cortex-m33",
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"-mthumb"
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]
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}
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],
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"version": 4
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}
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9
drivers/0x04_pwm_cbm/.vscode/extensions.json
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9
drivers/0x04_pwm_cbm/.vscode/extensions.json
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@@ -0,0 +1,9 @@
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{
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"recommendations": [
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"marus25.cortex-debug",
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"ms-vscode.cpptools",
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"ms-vscode.cpptools-extension-pack",
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"ms-vscode.vscode-serial-monitor",
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"raspberry-pi.raspberry-pi-pico"
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]
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}
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47
drivers/0x04_pwm_cbm/.vscode/launch.json
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47
drivers/0x04_pwm_cbm/.vscode/launch.json
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@@ -0,0 +1,47 @@
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{
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"version": "0.2.0",
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"configurations": [
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{
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"name": "Debug RP2350 (OpenOCD)",
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"cwd": "${workspaceFolder}",
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"executable": "${workspaceFolder}/build/pwm.elf",
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"request": "launch",
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"type": "cortex-debug",
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"servertype": "openocd",
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"serverpath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd",
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"searchDir": [
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"${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts"
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],
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"gdbPath": "${userHome}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gdb",
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"device": "RP2350",
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"configFiles": [
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"interface/cmsis-dap.cfg",
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"target/rp2350.cfg"
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],
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"svdFile": "${userHome}/.pico-sdk/sdk/2.2.0/src/rp2350/hardware_regs/RP2350.svd",
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"overrideLaunchCommands": [
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"set arch armv8-m.main",
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"set output-radix 16",
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"monitor reset init",
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"load",
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"monitor reset halt"
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],
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"openOCDPreConfigLaunchCommands": [
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"set USE_CORE { cm0 cm1 }"
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],
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"openOCDLaunchCommands": [
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"adapter speed 5000"
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],
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"preLaunchTask": "Compile Project",
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"showDevDebugOutput": "raw",
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"windows": {
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"serverpath": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
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"searchDir": [
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"${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/scripts"
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],
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"gdbPath": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1/bin/arm-none-eabi-gdb.exe",
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"svdFile": "${env:USERPROFILE}/.pico-sdk/sdk/2.2.0/src/rp2350/hardware_regs/RP2350.svd"
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}
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}
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]
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}
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40
drivers/0x04_pwm_cbm/.vscode/settings.json
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40
drivers/0x04_pwm_cbm/.vscode/settings.json
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@@ -0,0 +1,40 @@
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{
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"cmake.showSystemKits": false,
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"cmake.options.statusBarVisibility": "hidden",
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"cmake.options.advanced": {
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"build": {
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"statusBarVisibility": "hidden"
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},
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"launch": {
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"statusBarVisibility": "hidden"
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},
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"debug": {
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"statusBarVisibility": "hidden"
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}
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},
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"cmake.configureOnEdit": false,
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"cmake.automaticReconfigure": false,
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"cmake.configureOnOpen": false,
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"cmake.generator": "Ninja",
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"cmake.cmakePath": "${userHome}/.pico-sdk/cmake/v3.31.5/bin/cmake",
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"C_Cpp.debugShortcut": false,
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"terminal.integrated.env.windows": {
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"PICO_SDK_PATH": "${env:USERPROFILE}/.pico-sdk/sdk/2.2.0",
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"PICO_TOOLCHAIN_PATH": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1",
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"Path": "${env:USERPROFILE}/.pico-sdk/toolchain/14_2_Rel1/bin;${env:USERPROFILE}/.pico-sdk/picotool/2.2.0-a4/picotool;${env:USERPROFILE}/.pico-sdk/cmake/v3.31.5/bin;${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1;${env:PATH}"
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},
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"terminal.integrated.env.osx": {
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"PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.2.0",
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"PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1",
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"PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.2.0-a4/picotool:${env:HOME}/.pico-sdk/cmake/v3.31.5/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
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},
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"terminal.integrated.env.linux": {
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"PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.2.0",
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"PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1",
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"PATH": "${env:HOME}/.pico-sdk/toolchain/14_2_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.2.0-a4/picotool:${env:HOME}/.pico-sdk/cmake/v3.31.5/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
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},
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"raspberry-pi-pico.cmakeAutoConfigure": true,
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"raspberry-pi-pico.useCmakeTools": false,
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"raspberry-pi-pico.cmakePath": "${HOME}/.pico-sdk/cmake/v3.31.5/bin/cmake",
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"raspberry-pi-pico.ninjaPath": "${HOME}/.pico-sdk/ninja/v1.12.1/ninja"
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||||
}
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128
drivers/0x04_pwm_cbm/.vscode/tasks.json
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128
drivers/0x04_pwm_cbm/.vscode/tasks.json
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@@ -0,0 +1,128 @@
|
||||
{
|
||||
"version": "2.0.0",
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||||
"tasks": [
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{
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"label": "Compile Project",
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"type": "shell",
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"command": "make",
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"group": {
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"kind": "build",
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"isDefault": true
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},
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"presentation": {
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||||
"reveal": "always",
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"panel": "dedicated"
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},
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"problemMatcher": "$gcc",
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"windows": {
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"command": ".\\build.bat"
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}
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},
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||||
{
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"label": "Clean Project",
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"type": "shell",
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"command": "make clean",
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"group": "build",
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"presentation": {
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"reveal": "always",
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"panel": "dedicated"
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||||
},
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"problemMatcher": [],
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"windows": {
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"command": ".\\clean.bat"
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}
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},
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||||
{
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"label": "Run Project",
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"type": "shell",
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"command": "${userHome}/.pico-sdk/picotool/2.2.0-a4/picotool/picotool",
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"args": [
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"load",
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"build/pwm.uf2",
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"-fx"
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],
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"presentation": {
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||||
"reveal": "always",
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||||
"panel": "dedicated"
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||||
},
|
||||
"problemMatcher": [],
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||||
"dependsOn": [
|
||||
"Compile Project"
|
||||
],
|
||||
"windows": {
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||||
"command": "${env:USERPROFILE}/.pico-sdk/picotool/2.2.0-a4/picotool/picotool.exe"
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||||
}
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||||
},
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||||
{
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"label": "Flash",
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"type": "shell",
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"command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd",
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"args": [
|
||||
"-s",
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||||
"${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
|
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"-f",
|
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"interface/cmsis-dap.cfg",
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"-f",
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"target/rp2350.cfg",
|
||||
"-c",
|
||||
"adapter speed 5000; program build/pwm.elf verify reset exit"
|
||||
],
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||||
"problemMatcher": [],
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||||
"dependsOn": [
|
||||
"Compile Project"
|
||||
],
|
||||
"windows": {
|
||||
"command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe"
|
||||
}
|
||||
},
|
||||
{
|
||||
"label": "Rescue Reset",
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||||
"type": "process",
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||||
"command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd",
|
||||
"args": [
|
||||
"-s",
|
||||
"${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
|
||||
"-f",
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||||
"interface/cmsis-dap.cfg",
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"-f",
|
||||
"target/${command:raspberry-pi-pico.getChip}-rescue.cfg",
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||||
"-c",
|
||||
"adapter speed 5000; reset halt; exit"
|
||||
],
|
||||
"problemMatcher": [],
|
||||
"windows": {
|
||||
"command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe"
|
||||
}
|
||||
},
|
||||
{
|
||||
"label": "RISC-V Reset (RP2350)",
|
||||
"type": "process",
|
||||
"command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd",
|
||||
"args": [
|
||||
"-s",
|
||||
"${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
|
||||
"-c",
|
||||
"set USE_CORE { rv0 rv1 cm0 cm1 }",
|
||||
"-f",
|
||||
"interface/cmsis-dap.cfg",
|
||||
"-f",
|
||||
"target/rp2350.cfg",
|
||||
"-c",
|
||||
"adapter speed 5000; init;",
|
||||
"-c",
|
||||
"write_memory 0x40120158 8 { 0x3 }; echo [format \"Info : ARCHSEL 0x%02x\" [read_memory 0x40120158 8 1]];",
|
||||
"-c",
|
||||
"reset halt; targets rp2350.rv0; echo [format \"Info : ARCHSEL_STATUS 0x%02x\" [read_memory 0x4012015C 8 1]]; exit"
|
||||
],
|
||||
"problemMatcher": [],
|
||||
"windows": {
|
||||
"command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe"
|
||||
}
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"problemMatcher": []
|
||||
}
|
||||
]
|
||||
}
|
||||
214
drivers/0x04_pwm_cbm/Inc/rp2350.h
Normal file
214
drivers/0x04_pwm_cbm/Inc/rp2350.h
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@@ -0,0 +1,214 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350.h
|
||||
* @author Kevin Thomas
|
||||
* @brief RP2350 Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* Memory-mapped register structures and peripheral base addresses
|
||||
* for the RP2350 microcontroller (Cortex-M33 dual-core). All
|
||||
* register offsets verified against the RP2350 datasheet
|
||||
* (RP-008373-DS-2).
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_H
|
||||
#define __RP2350_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
/*!< Defines 'read / write' permissions */
|
||||
#define __IO volatile
|
||||
|
||||
/*!< Stack addresses */
|
||||
#define STACK_TOP 0x20082000UL
|
||||
#define STACK_LIMIT 0x2007A000UL
|
||||
|
||||
/*!< Memory map */
|
||||
#define XIP_BASE 0x10000000UL
|
||||
#define SRAM_BASE 0x20000000UL
|
||||
#define SIO_BASE 0xD0000000UL
|
||||
#define PPB_BASE 0xE0000000UL
|
||||
|
||||
/*!< APB peripherals */
|
||||
#define CLOCKS_BASE 0x40010000UL
|
||||
#define RESETS_BASE 0x40020000UL
|
||||
#define IO_BANK0_BASE 0x40028000UL
|
||||
#define PADS_BANK0_BASE 0x40038000UL
|
||||
#define XOSC_BASE 0x40048000UL
|
||||
#define UART0_BASE 0x40070000UL
|
||||
#define PWM_BASE 0x400A8000UL
|
||||
|
||||
/**
|
||||
* @brief XOSC (External Crystal Oscillator)
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t CTRL; // Control register Address offset: 0x00
|
||||
__IO uint32_t STATUS; // Status register Address offset: 0x04
|
||||
__IO uint32_t DORMANT; // Dormant mode Address offset: 0x08
|
||||
__IO uint32_t STARTUP; // Startup delay Address offset: 0x0C
|
||||
__IO uint32_t COUNT; // Frequency count Address offset: 0x10
|
||||
} XOSC_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLOCKS
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t RESERVED0[18]; // Other clock registers Address offset: 0x00-0x44
|
||||
__IO uint32_t CLK_PERI_CTRL; // Peripheral clock control Address offset: 0x48
|
||||
} CLOCKS_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief RESETS
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t RESET; // Reset control Address offset: 0x00
|
||||
__IO uint32_t WDSEL; // Watchdog select Address offset: 0x04
|
||||
__IO uint32_t RESET_DONE; // Reset done status Address offset: 0x08
|
||||
} RESETS_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief IO_BANK0 GPIO Control (one per GPIO)
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t STATUS; // GPIO status Address offset: 0x00
|
||||
__IO uint32_t CTRL; // GPIO control Address offset: 0x04
|
||||
} IO_BANK0_GPIO_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief IO_BANK0
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
IO_BANK0_GPIO_TypeDef GPIO[30]; // GPIO 0-29 status/ctrl pairs Address offset: 0x000-0x0E8
|
||||
} IO_BANK0_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief PADS_BANK0
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t VOLTAGE_SELECT; // Voltage select Address offset: 0x00
|
||||
__IO uint32_t GPIO[30]; // GPIO 0-29 pad control Address offset: 0x04-0x78
|
||||
} PADS_BANK0_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Peripheral Definitions
|
||||
*/
|
||||
#define XOSC ((XOSC_TypeDef *) XOSC_BASE)
|
||||
#define CLOCKS ((CLOCKS_TypeDef *) CLOCKS_BASE)
|
||||
#define RESETS ((RESETS_TypeDef *) RESETS_BASE)
|
||||
#define IO_BANK0 ((IO_BANK0_TypeDef *) IO_BANK0_BASE)
|
||||
#define PADS_BANK0 ((PADS_BANK0_TypeDef *) PADS_BANK0_BASE)
|
||||
#define SIO ((volatile uint32_t *) SIO_BASE)
|
||||
#define CPACR ((volatile uint32_t *) (PPB_BASE + 0x0ED88UL))
|
||||
|
||||
/**
|
||||
* @brief XOSC bit definitions
|
||||
*/
|
||||
#define XOSC_STATUS_STABLE_SHIFT 31U
|
||||
|
||||
/**
|
||||
* @brief CPACR bit definitions
|
||||
*/
|
||||
#define CPACR_CP0_SHIFT 0U
|
||||
#define CPACR_CP1_SHIFT 1U
|
||||
|
||||
/**
|
||||
* @brief CLOCKS bit definitions
|
||||
*/
|
||||
#define CLK_PERI_CTRL_ENABLE_SHIFT 11U
|
||||
#define CLK_PERI_CTRL_AUXSRC_SHIFT 5U
|
||||
#define CLK_PERI_CTRL_AUXSRC_XOSC 4U
|
||||
|
||||
/**
|
||||
* @brief RESETS bit definitions
|
||||
*/
|
||||
#define RESETS_RESET_IO_BANK0_SHIFT 6U
|
||||
#define RESETS_RESET_PWM_SHIFT 16U
|
||||
#define RESETS_RESET_UART0_SHIFT 26U
|
||||
|
||||
/**
|
||||
* @brief IO_BANK0 bit definitions
|
||||
*/
|
||||
#define IO_BANK0_CTRL_FUNCSEL_MASK 0x1FU
|
||||
#define IO_BANK0_CTRL_FUNCSEL_UART 0x02U
|
||||
#define IO_BANK0_CTRL_FUNCSEL_PWM 0x04U
|
||||
#define IO_BANK0_CTRL_FUNCSEL_SIO 0x05U
|
||||
|
||||
/**
|
||||
* @brief PADS_BANK0 bit definitions
|
||||
*/
|
||||
#define PADS_BANK0_OD_SHIFT 7U
|
||||
#define PADS_BANK0_IE_SHIFT 6U
|
||||
#define PADS_BANK0_ISO_SHIFT 8U
|
||||
|
||||
/**
|
||||
* @brief UART register offsets (word indices from UART0_BASE)
|
||||
*/
|
||||
#define UART_DR_OFFSET (0x000U / 4U)
|
||||
#define UART_FR_OFFSET (0x018U / 4U)
|
||||
#define UART_IBRD_OFFSET (0x024U / 4U)
|
||||
#define UART_FBRD_OFFSET (0x028U / 4U)
|
||||
#define UART_LCR_H_OFFSET (0x02CU / 4U)
|
||||
#define UART_CR_OFFSET (0x030U / 4U)
|
||||
|
||||
/**
|
||||
* @brief UART flag register bit definitions
|
||||
*/
|
||||
#define UART_FR_TXFF_MASK 32U
|
||||
#define UART_FR_RXFE_MASK 16U
|
||||
|
||||
/**
|
||||
* @brief UART line control and enable values
|
||||
*/
|
||||
#define UART_LCR_H_8N1_FIFO 0x70U
|
||||
#define UART_CR_ENABLE ((3U << 8) | 1U)
|
||||
|
||||
/**
|
||||
* @brief GPIO pin definitions
|
||||
*/
|
||||
#define LED_PIN 25U
|
||||
|
||||
/**
|
||||
* @brief SIO GPIO register offsets (word indices from SIO_BASE)
|
||||
*/
|
||||
#define SIO_GPIO_IN_OFFSET (0x004U / 4U)
|
||||
#define SIO_GPIO_OUT_SET_OFFSET (0x018U / 4U)
|
||||
#define SIO_GPIO_OUT_CLR_OFFSET (0x020U / 4U)
|
||||
#define SIO_GPIO_OUT_XOR_OFFSET (0x028U / 4U)
|
||||
#define SIO_GPIO_OE_SET_OFFSET (0x038U / 4U)
|
||||
|
||||
/**
|
||||
* @brief PWM register offsets (per slice, stride 0x14)
|
||||
*/
|
||||
#define PWM_CH_CSR_OFFSET 0x00U
|
||||
#define PWM_CH_DIV_OFFSET 0x04U
|
||||
#define PWM_CH_CC_OFFSET 0x0CU
|
||||
#define PWM_CH_TOP_OFFSET 0x10U
|
||||
#define PWM_CH_STRIDE 0x14U
|
||||
|
||||
/**
|
||||
* @brief PWM bit definitions
|
||||
*/
|
||||
#define PWM_CSR_EN_SHIFT 0U
|
||||
#define PWM_DIV_INT_SHIFT 4U
|
||||
#define PWM_CC_B_SHIFT 16U
|
||||
#define PWM_WRAP_DEFAULT 9999U
|
||||
|
||||
#endif /* __RP2350_H */
|
||||
33
drivers/0x04_pwm_cbm/Inc/rp2350_coprocessor.h
Normal file
33
drivers/0x04_pwm_cbm/Inc/rp2350_coprocessor.h
Normal file
@@ -0,0 +1,33 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_coprocessor.h
|
||||
* @author Kevin Thomas
|
||||
* @brief Coprocessor access control driver header for RP2350.
|
||||
*
|
||||
* Enables coprocessor access via the CPACR register.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_COPROCESSOR_H
|
||||
#define __RP2350_COPROCESSOR_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Enable coprocessor access via CPACR with DSB/ISB barriers.
|
||||
* @retval None
|
||||
*/
|
||||
void coprocessor_enable(void);
|
||||
|
||||
#endif /* __RP2350_COPROCESSOR_H */
|
||||
34
drivers/0x04_pwm_cbm/Inc/rp2350_delay.h
Normal file
34
drivers/0x04_pwm_cbm/Inc/rp2350_delay.h
Normal file
@@ -0,0 +1,34 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_delay.h
|
||||
* @author Kevin Thomas
|
||||
* @brief Delay driver header for RP2350.
|
||||
*
|
||||
* Millisecond busy-wait delay calibrated for a 14.5 MHz clock.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_DELAY_H
|
||||
#define __RP2350_DELAY_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Delay for the specified number of milliseconds.
|
||||
* @param ms number of milliseconds to delay
|
||||
* @retval None
|
||||
*/
|
||||
void delay_ms(uint32_t ms);
|
||||
|
||||
#endif /* __RP2350_DELAY_H */
|
||||
63
drivers/0x04_pwm_cbm/Inc/rp2350_gpio.h
Normal file
63
drivers/0x04_pwm_cbm/Inc/rp2350_gpio.h
Normal file
@@ -0,0 +1,63 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_gpio.h
|
||||
* @author Kevin Thomas
|
||||
* @brief GPIO driver header for RP2350.
|
||||
*
|
||||
* SIO-based GPIO configuration, set, clear, toggle, and read
|
||||
* functions for the RP2350 GPIO pins 0-29.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_GPIO_H
|
||||
#define __RP2350_GPIO_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Configure a GPIO pin as SIO output.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
void gpio_config(uint32_t gpio_num);
|
||||
|
||||
/**
|
||||
* @brief Drive a GPIO output high.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
void gpio_set(uint32_t gpio_num);
|
||||
|
||||
/**
|
||||
* @brief Drive a GPIO output low.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
void gpio_clear(uint32_t gpio_num);
|
||||
|
||||
/**
|
||||
* @brief Toggle a GPIO output.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
void gpio_toggle(uint32_t gpio_num);
|
||||
|
||||
/**
|
||||
* @brief Read the current input level of a GPIO pin.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval bool true if pin is high, false if low
|
||||
*/
|
||||
bool gpio_get(uint32_t gpio_num);
|
||||
|
||||
#endif /* __RP2350_GPIO_H */
|
||||
63
drivers/0x04_pwm_cbm/Inc/rp2350_led.h
Normal file
63
drivers/0x04_pwm_cbm/Inc/rp2350_led.h
Normal file
@@ -0,0 +1,63 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_led.h
|
||||
* @author Kevin Thomas
|
||||
* @brief LED driver header for RP2350.
|
||||
*
|
||||
* High-level GPIO output / LED driver wrapping the
|
||||
* low-level GPIO functions.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_LED_H
|
||||
#define __RP2350_LED_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Initialize a GPIO pin as a push-pull digital output.
|
||||
* @param pin GPIO pin number to configure
|
||||
* @retval None
|
||||
*/
|
||||
void led_init(uint32_t pin);
|
||||
|
||||
/**
|
||||
* @brief Drive the output pin high (LED on).
|
||||
* @param pin GPIO pin number
|
||||
* @retval None
|
||||
*/
|
||||
void led_on(uint32_t pin);
|
||||
|
||||
/**
|
||||
* @brief Drive the output pin low (LED off).
|
||||
* @param pin GPIO pin number
|
||||
* @retval None
|
||||
*/
|
||||
void led_off(uint32_t pin);
|
||||
|
||||
/**
|
||||
* @brief Toggle the current state of the output pin.
|
||||
* @param pin GPIO pin number
|
||||
* @retval None
|
||||
*/
|
||||
void led_toggle(uint32_t pin);
|
||||
|
||||
/**
|
||||
* @brief Query the current drive state of the output pin.
|
||||
* @param pin GPIO pin number
|
||||
* @retval bool true if the pin is driven high, false if low
|
||||
*/
|
||||
bool led_get_state(uint32_t pin);
|
||||
|
||||
#endif /* __RP2350_LED_H */
|
||||
48
drivers/0x04_pwm_cbm/Inc/rp2350_pwm.h
Normal file
48
drivers/0x04_pwm_cbm/Inc/rp2350_pwm.h
Normal file
@@ -0,0 +1,48 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_pwm.h
|
||||
* @author Kevin Thomas
|
||||
* @brief PWM driver header for RP2350.
|
||||
*
|
||||
* Provides PWM output on GPIO 25 (onboard LED) at approximately
|
||||
* 1 kHz using PWM slice 4, channel B. Duty cycle is controllable
|
||||
* from 0 to 100 percent.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_PWM_H
|
||||
#define __RP2350_PWM_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Release PWM from reset and wait until ready.
|
||||
* @retval None
|
||||
*/
|
||||
void pwm_release_reset(void);
|
||||
|
||||
/**
|
||||
* @brief Initialize PWM on GPIO 25 at approximately 1 kHz.
|
||||
* @retval None
|
||||
*/
|
||||
void pwm_init(void);
|
||||
|
||||
/**
|
||||
* @brief Set the PWM duty cycle as an integer percentage.
|
||||
* @param percent duty cycle from 0 (off) to 100 (fully on)
|
||||
* @retval None
|
||||
*/
|
||||
void pwm_set_duty(uint8_t percent);
|
||||
|
||||
#endif /* __RP2350_PWM_H */
|
||||
33
drivers/0x04_pwm_cbm/Inc/rp2350_reset.h
Normal file
33
drivers/0x04_pwm_cbm/Inc/rp2350_reset.h
Normal file
@@ -0,0 +1,33 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_reset.h
|
||||
* @author Kevin Thomas
|
||||
* @brief Reset controller driver header for RP2350.
|
||||
*
|
||||
* Provides subsystem reset release for IO_BANK0.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_RESET_H
|
||||
#define __RP2350_RESET_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Release IO_BANK0 from reset and wait until ready.
|
||||
* @retval None
|
||||
*/
|
||||
void reset_init_subsystem(void);
|
||||
|
||||
#endif /* __RP2350_RESET_H */
|
||||
33
drivers/0x04_pwm_cbm/Inc/rp2350_reset_handler.h
Normal file
33
drivers/0x04_pwm_cbm/Inc/rp2350_reset_handler.h
Normal file
@@ -0,0 +1,33 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_reset_handler.h
|
||||
* @author Kevin Thomas
|
||||
* @brief Reset handler header for RP2350.
|
||||
*
|
||||
* Entry point after reset. Performs stack initialization, XOSC
|
||||
* setup, subsystem reset release, UART initialization,
|
||||
* coprocessor enable, and branches to main().
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_RESET_HANDLER_H
|
||||
#define __RP2350_RESET_HANDLER_H
|
||||
|
||||
/**
|
||||
* @brief Reset handler entry point (naked, noreturn).
|
||||
* @retval None
|
||||
*/
|
||||
void Reset_Handler(void) __attribute__((noreturn));
|
||||
|
||||
#endif /* __RP2350_RESET_HANDLER_H */
|
||||
34
drivers/0x04_pwm_cbm/Inc/rp2350_stack.h
Normal file
34
drivers/0x04_pwm_cbm/Inc/rp2350_stack.h
Normal file
@@ -0,0 +1,34 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_stack.h
|
||||
* @author Kevin Thomas
|
||||
* @brief Stack pointer initialization header for RP2350.
|
||||
*
|
||||
* Sets MSP, PSP, MSPLIM, and PSPLIM from the STACK_TOP and
|
||||
* STACK_LIMIT values defined in rp2350.h.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_STACK_H
|
||||
#define __RP2350_STACK_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Initialize MSP, PSP, MSPLIM, and PSPLIM stack pointers.
|
||||
* @retval None
|
||||
*/
|
||||
void stack_init(void);
|
||||
|
||||
#endif /* __RP2350_STACK_H */
|
||||
73
drivers/0x04_pwm_cbm/Inc/rp2350_uart.h
Normal file
73
drivers/0x04_pwm_cbm/Inc/rp2350_uart.h
Normal file
@@ -0,0 +1,73 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_uart.h
|
||||
* @author Kevin Thomas
|
||||
* @brief UART0 driver header for RP2350.
|
||||
*
|
||||
* Bare-metal UART0 driver supporting TX/RX on GPIO 0/1 at
|
||||
* 115200 baud (14.5 MHz XOSC clock).
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_UART_H
|
||||
#define __RP2350_UART_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Release UART0 from reset and wait until ready.
|
||||
* @retval None
|
||||
*/
|
||||
void uart_release_reset(void);
|
||||
|
||||
/**
|
||||
* @brief Initialize UART0 pins, baud rate, line control, and enable.
|
||||
* @retval None
|
||||
*/
|
||||
void uart_init(void);
|
||||
|
||||
/**
|
||||
* @brief Check whether a received byte is waiting in the UART FIFO.
|
||||
* @retval bool true if at least one byte is available
|
||||
*/
|
||||
bool uart_is_readable(void);
|
||||
|
||||
/**
|
||||
* @brief Read one character from UART0 (blocking).
|
||||
* @retval char the received character
|
||||
*/
|
||||
char uart_getchar(void);
|
||||
|
||||
/**
|
||||
* @brief Transmit one character over UART0 (blocking).
|
||||
* @param c character to transmit
|
||||
* @retval None
|
||||
*/
|
||||
void uart_putchar(char c);
|
||||
|
||||
/**
|
||||
* @brief Transmit a null-terminated string over UART0.
|
||||
* @param str pointer to the string to send
|
||||
* @retval None
|
||||
*/
|
||||
void uart_puts(const char *str);
|
||||
|
||||
/**
|
||||
* @brief Convert a lowercase ASCII character to uppercase.
|
||||
* @param c input character
|
||||
* @retval char uppercase equivalent or original character
|
||||
*/
|
||||
char uart_to_upper(char c);
|
||||
|
||||
#endif /* __RP2350_UART_H */
|
||||
40
drivers/0x04_pwm_cbm/Inc/rp2350_xosc.h
Normal file
40
drivers/0x04_pwm_cbm/Inc/rp2350_xosc.h
Normal file
@@ -0,0 +1,40 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_xosc.h
|
||||
* @author Kevin Thomas
|
||||
* @brief XOSC driver header for RP2350.
|
||||
*
|
||||
* External crystal oscillator initialization and peripheral
|
||||
* clock enable using the XOSC registers.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __RP2350_XOSC_H
|
||||
#define __RP2350_XOSC_H
|
||||
|
||||
#include "rp2350.h"
|
||||
|
||||
/**
|
||||
* @brief Initialize the external crystal oscillator and wait until stable.
|
||||
* @retval None
|
||||
*/
|
||||
void xosc_init(void);
|
||||
|
||||
/**
|
||||
* @brief Enable the XOSC peripheral clock via CLK_PERI_CTRL.
|
||||
* @retval None
|
||||
*/
|
||||
void xosc_enable_peri_clk(void);
|
||||
|
||||
#endif /* __RP2350_XOSC_H */
|
||||
79
drivers/0x04_pwm_cbm/Makefile
Normal file
79
drivers/0x04_pwm_cbm/Makefile
Normal file
@@ -0,0 +1,79 @@
|
||||
# ------------------------------------------------------------------------------
|
||||
# @file Makefile
|
||||
# @author Kevin Thomas
|
||||
# @brief Build script for RP2350 bare-metal C PWM driver.
|
||||
#
|
||||
# Compiles, links, and generates UF2 firmware for the RP2350.
|
||||
# ------------------------------------------------------------------------------
|
||||
|
||||
# Toolchain
|
||||
CC = arm-none-eabi-gcc
|
||||
OBJCOPY = arm-none-eabi-objcopy
|
||||
SIZE = arm-none-eabi-size
|
||||
|
||||
# Target
|
||||
TARGET = pwm
|
||||
|
||||
# Directories
|
||||
SRC_DIR = Src
|
||||
INC_DIR = Inc
|
||||
BUILD_DIR = build
|
||||
|
||||
# CPU flags
|
||||
CPU_FLAGS = -mcpu=cortex-m33 -mthumb
|
||||
|
||||
# Compiler flags
|
||||
CFLAGS = $(CPU_FLAGS) -Og -g3 -Wall -Wextra \
|
||||
-ffunction-sections -fdata-sections \
|
||||
-I$(INC_DIR)
|
||||
|
||||
# Linker flags
|
||||
LDFLAGS = $(CPU_FLAGS) -T linker.ld -nostdlib -Wl,--gc-sections
|
||||
|
||||
# Source files
|
||||
SRCS = $(SRC_DIR)/vector_table.c \
|
||||
$(SRC_DIR)/rp2350_reset_handler.c \
|
||||
$(SRC_DIR)/rp2350_stack.c \
|
||||
$(SRC_DIR)/rp2350_xosc.c \
|
||||
$(SRC_DIR)/rp2350_reset.c \
|
||||
$(SRC_DIR)/rp2350_coprocessor.c \
|
||||
$(SRC_DIR)/rp2350_uart.c \
|
||||
$(SRC_DIR)/rp2350_pwm.c \
|
||||
$(SRC_DIR)/rp2350_delay.c \
|
||||
$(SRC_DIR)/main.c \
|
||||
$(SRC_DIR)/image_def.c
|
||||
|
||||
# Object files
|
||||
OBJS = $(patsubst $(SRC_DIR)/%.c,$(BUILD_DIR)/%.o,$(SRCS))
|
||||
|
||||
# Rules
|
||||
.PHONY: all clean flash
|
||||
|
||||
all: $(BUILD_DIR)/$(TARGET).uf2
|
||||
@echo "==================================="
|
||||
@echo "SUCCESS! Created $(TARGET).bin and $(TARGET).uf2"
|
||||
@echo "==================================="
|
||||
|
||||
$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c | $(BUILD_DIR)
|
||||
$(CC) $(CFLAGS) -c $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJS)
|
||||
$(CC) $(LDFLAGS) $(OBJS) -o $@
|
||||
$(SIZE) $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).bin: $(BUILD_DIR)/$(TARGET).elf
|
||||
$(OBJCOPY) -O binary $< $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).uf2: $(BUILD_DIR)/$(TARGET).bin
|
||||
python3 uf2conv.py -b 0x10000000 -f 0xe48bff59 -o $@ $<
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir -p $(BUILD_DIR)
|
||||
|
||||
clean:
|
||||
rm -rf $(BUILD_DIR)
|
||||
|
||||
flash: $(BUILD_DIR)/$(TARGET).elf
|
||||
openocd -f interface/cmsis-dap.cfg -f target/rp2350.cfg \
|
||||
-c "adapter speed 5000" \
|
||||
-c "program $< verify reset exit"
|
||||
35
drivers/0x04_pwm_cbm/Src/image_def.c
Normal file
35
drivers/0x04_pwm_cbm/Src/image_def.c
Normal file
@@ -0,0 +1,35 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file image_def.c
|
||||
* @author Kevin Thomas
|
||||
* @brief RP2350 IMAGE_DEF block for boot ROM image recognition.
|
||||
*
|
||||
* Must appear within the first 4 KB of flash for the boot ROM
|
||||
* to accept the image.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @brief IMAGE_DEF block structure placed in flash
|
||||
*/
|
||||
__attribute__((section(".embedded_block"), used))
|
||||
const uint8_t picobin_block[] = {
|
||||
0xD3, 0xDE, 0xFF, 0xFF,
|
||||
0x42, 0x01, 0x21, 0x10,
|
||||
0xFF, 0x01, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
0x79, 0x35, 0x12, 0xAB
|
||||
};
|
||||
99
drivers/0x04_pwm_cbm/Src/main.c
Normal file
99
drivers/0x04_pwm_cbm/Src/main.c
Normal file
@@ -0,0 +1,99 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file main.c
|
||||
* @author Kevin Thomas
|
||||
* @brief PWM demonstration: LED breathing effect via duty-cycle sweep.
|
||||
*
|
||||
* Demonstrates PWM output using the PWM driver. A signal on
|
||||
* GPIO 25 (onboard LED) sweeps its duty cycle from 0% to 100%
|
||||
* and back to produce a smooth breathing effect. The current
|
||||
* duty is reported over UART.
|
||||
*
|
||||
* Wiring:
|
||||
* GPIO0 -> UART TX (USB-to-UART adapter RX)
|
||||
* GPIO1 -> UART RX (USB-to-UART adapter TX)
|
||||
* GPIO25 -> Onboard LED (no external wiring needed)
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_pwm.h"
|
||||
#include "rp2350_uart.h"
|
||||
#include "rp2350_delay.h"
|
||||
|
||||
#define SWEEP_STEP 5
|
||||
#define SWEEP_DELAY_MS 50
|
||||
|
||||
/**
|
||||
* @brief Print a duty percentage value as a decimal string over UART.
|
||||
* @param duty duty cycle value (0-100)
|
||||
* @retval None
|
||||
*/
|
||||
static void _print_duty(uint8_t duty)
|
||||
{
|
||||
char buf[4];
|
||||
uint8_t idx = 0;
|
||||
if (duty >= 100) {
|
||||
buf[idx++] = '1';
|
||||
buf[idx++] = '0';
|
||||
buf[idx++] = '0';
|
||||
} else if (duty >= 10) {
|
||||
buf[idx++] = (char)('0' + duty / 10);
|
||||
buf[idx++] = (char)('0' + duty % 10);
|
||||
} else {
|
||||
buf[idx++] = (char)('0' + duty);
|
||||
}
|
||||
buf[idx] = '\0';
|
||||
uart_puts("Duty: ");
|
||||
uart_puts(buf);
|
||||
uart_puts("%\r\n");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sweep duty cycle upward from 0 to 100 percent.
|
||||
* @retval None
|
||||
*/
|
||||
static void _sweep_up(void)
|
||||
{
|
||||
for (uint8_t duty = 0; duty <= 100; duty += SWEEP_STEP) {
|
||||
pwm_set_duty(duty);
|
||||
_print_duty(duty);
|
||||
delay_ms(SWEEP_DELAY_MS);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sweep duty cycle downward from 100 to 0 percent.
|
||||
* @retval None
|
||||
*/
|
||||
static void _sweep_down(void)
|
||||
{
|
||||
for (int8_t duty = 100; duty >= 0; duty -= SWEEP_STEP) {
|
||||
pwm_set_duty((uint8_t)duty);
|
||||
_print_duty((uint8_t)duty);
|
||||
delay_ms(SWEEP_DELAY_MS);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Application entry point for the PWM LED breathing demo.
|
||||
* @retval int does not return
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
uart_puts("PWM initialized: GPIO25\r\n");
|
||||
while (1) {
|
||||
_sweep_up();
|
||||
_sweep_down();
|
||||
}
|
||||
}
|
||||
34
drivers/0x04_pwm_cbm/Src/rp2350_coprocessor.c
Normal file
34
drivers/0x04_pwm_cbm/Src/rp2350_coprocessor.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_coprocessor.c
|
||||
* @author Kevin Thomas
|
||||
* @brief Coprocessor access control driver implementation for RP2350.
|
||||
*
|
||||
* Grants access to coprocessors 0 and 1 by setting the
|
||||
* corresponding bits in CPACR with DSB/ISB barriers.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_coprocessor.h"
|
||||
|
||||
void coprocessor_enable(void)
|
||||
{
|
||||
uint32_t value;
|
||||
value = *CPACR;
|
||||
value |= (1U << CPACR_CP1_SHIFT);
|
||||
value |= (1U << CPACR_CP0_SHIFT);
|
||||
*CPACR = value;
|
||||
__asm__ volatile ("dsb");
|
||||
__asm__ volatile ("isb");
|
||||
}
|
||||
39
drivers/0x04_pwm_cbm/Src/rp2350_delay.c
Normal file
39
drivers/0x04_pwm_cbm/Src/rp2350_delay.c
Normal file
@@ -0,0 +1,39 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_delay.c
|
||||
* @author Kevin Thomas
|
||||
* @brief Delay driver implementation for RP2350.
|
||||
*
|
||||
* Busy-wait millisecond delay calibrated for a 14.5 MHz clock
|
||||
* (3600 loop iterations per millisecond).
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_delay.h"
|
||||
|
||||
void delay_ms(uint32_t ms)
|
||||
{
|
||||
if (ms == 0)
|
||||
return;
|
||||
__asm__ volatile (
|
||||
"mov r4, #3600\n\t"
|
||||
"mul r5, %0, r4\n\t"
|
||||
"1:\n\t"
|
||||
"subs r5, #1\n\t"
|
||||
"bne 1b\n\t"
|
||||
:
|
||||
: "r" (ms)
|
||||
: "r4", "r5", "cc"
|
||||
);
|
||||
}
|
||||
90
drivers/0x04_pwm_cbm/Src/rp2350_gpio.c
Normal file
90
drivers/0x04_pwm_cbm/Src/rp2350_gpio.c
Normal file
@@ -0,0 +1,90 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_gpio.c
|
||||
* @author Kevin Thomas
|
||||
* @brief GPIO driver implementation for RP2350.
|
||||
*
|
||||
* SIO-based GPIO configuration using IO_BANK0 and PADS_BANK0
|
||||
* register structs defined in rp2350.h. All register offsets
|
||||
* verified against the RP2350 datasheet (RP-008373-DS-2).
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_gpio.h"
|
||||
|
||||
/**
|
||||
* @brief Configure pad control for a GPIO pin.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
static void _gpio_config_pad(uint32_t gpio_num)
|
||||
{
|
||||
uint32_t value;
|
||||
value = PADS_BANK0->GPIO[gpio_num];
|
||||
value &= ~(1U << PADS_BANK0_OD_SHIFT);
|
||||
value |= (1U << PADS_BANK0_IE_SHIFT);
|
||||
value &= ~(1U << PADS_BANK0_ISO_SHIFT);
|
||||
PADS_BANK0->GPIO[gpio_num] = value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set IO_BANK0 FUNCSEL to SIO for a GPIO pin.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
static void _gpio_config_funcsel(uint32_t gpio_num)
|
||||
{
|
||||
uint32_t value;
|
||||
value = IO_BANK0->GPIO[gpio_num].CTRL;
|
||||
value &= ~IO_BANK0_CTRL_FUNCSEL_MASK;
|
||||
value |= IO_BANK0_CTRL_FUNCSEL_SIO;
|
||||
IO_BANK0->GPIO[gpio_num].CTRL = value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the output driver for a GPIO pin via SIO.
|
||||
* @param gpio_num GPIO pin number (0-29)
|
||||
* @retval None
|
||||
*/
|
||||
static void _gpio_enable_output(uint32_t gpio_num)
|
||||
{
|
||||
SIO[SIO_GPIO_OE_SET_OFFSET] = (1U << gpio_num);
|
||||
}
|
||||
|
||||
void gpio_config(uint32_t gpio_num)
|
||||
{
|
||||
_gpio_config_pad(gpio_num);
|
||||
_gpio_config_funcsel(gpio_num);
|
||||
_gpio_enable_output(gpio_num);
|
||||
}
|
||||
|
||||
void gpio_set(uint32_t gpio_num)
|
||||
{
|
||||
SIO[SIO_GPIO_OUT_SET_OFFSET] = (1U << gpio_num);
|
||||
}
|
||||
|
||||
void gpio_clear(uint32_t gpio_num)
|
||||
{
|
||||
SIO[SIO_GPIO_OUT_CLR_OFFSET] = (1U << gpio_num);
|
||||
}
|
||||
|
||||
void gpio_toggle(uint32_t gpio_num)
|
||||
{
|
||||
SIO[SIO_GPIO_OUT_XOR_OFFSET] = (1U << gpio_num);
|
||||
}
|
||||
|
||||
bool gpio_get(uint32_t gpio_num)
|
||||
{
|
||||
return (SIO[SIO_GPIO_IN_OFFSET] & (1U << gpio_num)) != 0;
|
||||
}
|
||||
49
drivers/0x04_pwm_cbm/Src/rp2350_led.c
Normal file
49
drivers/0x04_pwm_cbm/Src/rp2350_led.c
Normal file
@@ -0,0 +1,49 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_led.c
|
||||
* @author Kevin Thomas
|
||||
* @brief LED driver implementation for RP2350.
|
||||
*
|
||||
* High-level wrapper around the GPIO driver for LED control.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_led.h"
|
||||
#include "rp2350_gpio.h"
|
||||
|
||||
void led_init(uint32_t pin)
|
||||
{
|
||||
gpio_config(pin);
|
||||
gpio_clear(pin);
|
||||
}
|
||||
|
||||
void led_on(uint32_t pin)
|
||||
{
|
||||
gpio_set(pin);
|
||||
}
|
||||
|
||||
void led_off(uint32_t pin)
|
||||
{
|
||||
gpio_clear(pin);
|
||||
}
|
||||
|
||||
void led_toggle(uint32_t pin)
|
||||
{
|
||||
gpio_toggle(pin);
|
||||
}
|
||||
|
||||
bool led_get_state(uint32_t pin)
|
||||
{
|
||||
return gpio_get(pin);
|
||||
}
|
||||
126
drivers/0x04_pwm_cbm/Src/rp2350_pwm.c
Normal file
126
drivers/0x04_pwm_cbm/Src/rp2350_pwm.c
Normal file
@@ -0,0 +1,126 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_pwm.c
|
||||
* @author Kevin Thomas
|
||||
* @brief PWM driver implementation for RP2350.
|
||||
*
|
||||
* Configures PWM slice 4, channel B on GPIO 25 (onboard LED).
|
||||
* Uses a wrap value of 9999 with no clock division, yielding
|
||||
* approximately 650 Hz from the ROSC system clock.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_pwm.h"
|
||||
|
||||
#define PWM ((volatile uint32_t *) PWM_BASE)
|
||||
|
||||
/**
|
||||
* @brief PWM slice number for GPIO 25.
|
||||
*/
|
||||
#define PWM_SLICE 4U
|
||||
|
||||
/**
|
||||
* @brief Compute the byte offset for a register within the slice.
|
||||
* @param reg per-slice register offset (e.g. PWM_CH_CSR_OFFSET)
|
||||
* @retval uint32_t word index from PWM_BASE
|
||||
*/
|
||||
#define PWM_REG(reg) (((PWM_SLICE * PWM_CH_STRIDE) + (reg)) / 4U)
|
||||
|
||||
/**
|
||||
* @brief Clear the PWM reset bit in the reset controller.
|
||||
* @retval None
|
||||
*/
|
||||
static void _pwm_clear_reset_bit(void)
|
||||
{
|
||||
uint32_t value;
|
||||
value = RESETS->RESET;
|
||||
value &= ~(1U << RESETS_RESET_PWM_SHIFT);
|
||||
RESETS->RESET = value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Wait until the PWM block is out of reset.
|
||||
* @retval None
|
||||
*/
|
||||
static void _pwm_wait_reset_done(void)
|
||||
{
|
||||
while ((RESETS->RESET_DONE & (1U << RESETS_RESET_PWM_SHIFT)) == 0) {
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO 25 pad and funcsel for PWM output.
|
||||
* @retval None
|
||||
*/
|
||||
static void _pwm_configure_pin(void)
|
||||
{
|
||||
uint32_t value;
|
||||
value = PADS_BANK0->GPIO[LED_PIN];
|
||||
value &= ~(1U << PADS_BANK0_OD_SHIFT);
|
||||
value |= (1U << PADS_BANK0_IE_SHIFT);
|
||||
value &= ~(1U << PADS_BANK0_ISO_SHIFT);
|
||||
PADS_BANK0->GPIO[LED_PIN] = value;
|
||||
IO_BANK0->GPIO[LED_PIN].CTRL = IO_BANK0_CTRL_FUNCSEL_PWM;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the clock divider to 1 (no division).
|
||||
* @retval None
|
||||
*/
|
||||
static void _pwm_set_divider(void)
|
||||
{
|
||||
PWM[PWM_REG(PWM_CH_DIV_OFFSET)] = (1U << PWM_DIV_INT_SHIFT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the wrap (TOP) value and zero the compare register.
|
||||
* @retval None
|
||||
*/
|
||||
static void _pwm_set_wrap(void)
|
||||
{
|
||||
PWM[PWM_REG(PWM_CH_TOP_OFFSET)] = PWM_WRAP_DEFAULT;
|
||||
PWM[PWM_REG(PWM_CH_CC_OFFSET)] = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the PWM slice counter.
|
||||
* @retval None
|
||||
*/
|
||||
static void _pwm_enable(void)
|
||||
{
|
||||
PWM[PWM_REG(PWM_CH_CSR_OFFSET)] = (1U << PWM_CSR_EN_SHIFT);
|
||||
}
|
||||
|
||||
void pwm_release_reset(void)
|
||||
{
|
||||
_pwm_clear_reset_bit();
|
||||
_pwm_wait_reset_done();
|
||||
}
|
||||
|
||||
void pwm_init(void)
|
||||
{
|
||||
_pwm_configure_pin();
|
||||
_pwm_set_divider();
|
||||
_pwm_set_wrap();
|
||||
_pwm_enable();
|
||||
}
|
||||
|
||||
void pwm_set_duty(uint8_t percent)
|
||||
{
|
||||
uint32_t level;
|
||||
if (percent > 100)
|
||||
percent = 100;
|
||||
level = ((uint32_t)percent * (PWM_WRAP_DEFAULT + 1)) / 100;
|
||||
PWM[PWM_REG(PWM_CH_CC_OFFSET)] = (level << PWM_CC_B_SHIFT);
|
||||
}
|
||||
33
drivers/0x04_pwm_cbm/Src/rp2350_reset.c
Normal file
33
drivers/0x04_pwm_cbm/Src/rp2350_reset.c
Normal file
@@ -0,0 +1,33 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_reset.c
|
||||
* @author Kevin Thomas
|
||||
* @brief Reset controller driver implementation for RP2350.
|
||||
*
|
||||
* Releases IO_BANK0 from reset and waits until the subsystem
|
||||
* is ready.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_reset.h"
|
||||
|
||||
void reset_init_subsystem(void)
|
||||
{
|
||||
uint32_t value;
|
||||
value = RESETS->RESET;
|
||||
value &= ~(1U << RESETS_RESET_IO_BANK0_SHIFT);
|
||||
RESETS->RESET = value;
|
||||
while ((RESETS->RESET_DONE & (1U << RESETS_RESET_IO_BANK0_SHIFT)) == 0) {
|
||||
}
|
||||
}
|
||||
48
drivers/0x04_pwm_cbm/Src/rp2350_reset_handler.c
Normal file
48
drivers/0x04_pwm_cbm/Src/rp2350_reset_handler.c
Normal file
@@ -0,0 +1,48 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_reset_handler.c
|
||||
* @author Kevin Thomas
|
||||
* @brief Reset handler implementation for RP2350.
|
||||
*
|
||||
* Entry point after power-on or system reset. Initializes the
|
||||
* stack, XOSC, subsystem resets, UART, PWM, coprocessor, then
|
||||
* branches to main().
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_reset_handler.h"
|
||||
#include "rp2350_stack.h"
|
||||
#include "rp2350_xosc.h"
|
||||
#include "rp2350_reset.h"
|
||||
#include "rp2350_uart.h"
|
||||
#include "rp2350_pwm.h"
|
||||
#include "rp2350_coprocessor.h"
|
||||
|
||||
extern int main(void);
|
||||
|
||||
void __attribute__((naked, noreturn)) Reset_Handler(void)
|
||||
{
|
||||
__asm__ volatile (
|
||||
"bl stack_init\n\t"
|
||||
"bl xosc_init\n\t"
|
||||
"bl xosc_enable_peri_clk\n\t"
|
||||
"bl reset_init_subsystem\n\t"
|
||||
"bl uart_release_reset\n\t"
|
||||
"bl uart_init\n\t"
|
||||
"bl pwm_release_reset\n\t"
|
||||
"bl pwm_init\n\t"
|
||||
"bl coprocessor_enable\n\t"
|
||||
"b main\n\t"
|
||||
);
|
||||
}
|
||||
38
drivers/0x04_pwm_cbm/Src/rp2350_stack.c
Normal file
38
drivers/0x04_pwm_cbm/Src/rp2350_stack.c
Normal file
@@ -0,0 +1,38 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_stack.c
|
||||
* @author Kevin Thomas
|
||||
* @brief Stack pointer initialization for RP2350.
|
||||
*
|
||||
* Sets MSP, PSP, MSPLIM, and PSPLIM using inline assembly.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_stack.h"
|
||||
|
||||
void stack_init(void)
|
||||
{
|
||||
__asm__ volatile (
|
||||
"ldr r0, =%0\n\t"
|
||||
"msr PSP, r0\n\t"
|
||||
"ldr r0, =%1\n\t"
|
||||
"msr MSPLIM, r0\n\t"
|
||||
"msr PSPLIM, r0\n\t"
|
||||
"ldr r0, =%0\n\t"
|
||||
"msr MSP, r0\n\t"
|
||||
:
|
||||
: "i" (STACK_TOP), "i" (STACK_LIMIT)
|
||||
: "r0"
|
||||
);
|
||||
}
|
||||
126
drivers/0x04_pwm_cbm/Src/rp2350_uart.c
Normal file
126
drivers/0x04_pwm_cbm/Src/rp2350_uart.c
Normal file
@@ -0,0 +1,126 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_uart.c
|
||||
* @author Kevin Thomas
|
||||
* @brief UART0 driver implementation for RP2350.
|
||||
*
|
||||
* Configures UART0 on GPIO 0 (TX) and GPIO 1 (RX) at 115200
|
||||
* baud using the 14.5 MHz XOSC clock.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_uart.h"
|
||||
|
||||
#define UART_BASE ((volatile uint32_t *) UART0_BASE)
|
||||
|
||||
/**
|
||||
* @brief Clear the UART0 reset bit in the reset controller.
|
||||
* @retval None
|
||||
*/
|
||||
static void _uart_clear_reset_bit(void)
|
||||
{
|
||||
uint32_t value;
|
||||
value = RESETS->RESET;
|
||||
value &= ~(1U << RESETS_RESET_UART0_SHIFT);
|
||||
RESETS->RESET = value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Wait until the UART0 block is out of reset.
|
||||
* @retval None
|
||||
*/
|
||||
static void _uart_wait_reset_done(void)
|
||||
{
|
||||
while ((RESETS->RESET_DONE & (1U << RESETS_RESET_UART0_SHIFT)) == 0) {
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO pins 0 (TX) and 1 (RX) for UART function.
|
||||
* @retval None
|
||||
*/
|
||||
static void _uart_configure_pins(void)
|
||||
{
|
||||
IO_BANK0->GPIO[0].CTRL = IO_BANK0_CTRL_FUNCSEL_UART;
|
||||
IO_BANK0->GPIO[1].CTRL = IO_BANK0_CTRL_FUNCSEL_UART;
|
||||
PADS_BANK0->GPIO[0] = 0x04;
|
||||
PADS_BANK0->GPIO[1] = 0x40;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set UART0 baud rate divisors for 115200 at 14.5 MHz.
|
||||
* @retval None
|
||||
*/
|
||||
static void _uart_set_baud(void)
|
||||
{
|
||||
UART_BASE[UART_CR_OFFSET] = 0;
|
||||
UART_BASE[UART_IBRD_OFFSET] = 6;
|
||||
UART_BASE[UART_FBRD_OFFSET] = 33;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure line control and enable UART0.
|
||||
* @retval None
|
||||
*/
|
||||
static void _uart_enable(void)
|
||||
{
|
||||
UART_BASE[UART_LCR_H_OFFSET] = UART_LCR_H_8N1_FIFO;
|
||||
UART_BASE[UART_CR_OFFSET] = UART_CR_ENABLE;
|
||||
}
|
||||
|
||||
void uart_release_reset(void)
|
||||
{
|
||||
_uart_clear_reset_bit();
|
||||
_uart_wait_reset_done();
|
||||
}
|
||||
|
||||
void uart_init(void)
|
||||
{
|
||||
_uart_configure_pins();
|
||||
_uart_set_baud();
|
||||
_uart_enable();
|
||||
}
|
||||
|
||||
bool uart_is_readable(void)
|
||||
{
|
||||
return (UART_BASE[UART_FR_OFFSET] & UART_FR_RXFE_MASK) == 0;
|
||||
}
|
||||
|
||||
char uart_getchar(void)
|
||||
{
|
||||
while (UART_BASE[UART_FR_OFFSET] & UART_FR_RXFE_MASK) {
|
||||
}
|
||||
return (char)(UART_BASE[UART_DR_OFFSET] & 0xFF);
|
||||
}
|
||||
|
||||
void uart_putchar(char c)
|
||||
{
|
||||
while (UART_BASE[UART_FR_OFFSET] & UART_FR_TXFF_MASK) {
|
||||
}
|
||||
UART_BASE[UART_DR_OFFSET] = (uint32_t)c;
|
||||
}
|
||||
|
||||
void uart_puts(const char *str)
|
||||
{
|
||||
while (*str) {
|
||||
uart_putchar(*str++);
|
||||
}
|
||||
}
|
||||
|
||||
char uart_to_upper(char c)
|
||||
{
|
||||
if (c >= 'a' && c <= 'z')
|
||||
return (char)(c - 32);
|
||||
return c;
|
||||
}
|
||||
40
drivers/0x04_pwm_cbm/Src/rp2350_xosc.c
Normal file
40
drivers/0x04_pwm_cbm/Src/rp2350_xosc.c
Normal file
@@ -0,0 +1,40 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file rp2350_xosc.c
|
||||
* @author Kevin Thomas
|
||||
* @brief XOSC driver implementation for RP2350.
|
||||
*
|
||||
* Configures the external crystal oscillator and enables the
|
||||
* peripheral clock sourced from XOSC.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rp2350_xosc.h"
|
||||
|
||||
void xosc_init(void)
|
||||
{
|
||||
XOSC->STARTUP = 0x00C4U;
|
||||
XOSC->CTRL = 0x00FABAA0U;
|
||||
while ((XOSC->STATUS & (1U << XOSC_STATUS_STABLE_SHIFT)) == 0) {
|
||||
}
|
||||
}
|
||||
|
||||
void xosc_enable_peri_clk(void)
|
||||
{
|
||||
uint32_t value;
|
||||
value = CLOCKS->CLK_PERI_CTRL;
|
||||
value |= (1U << CLK_PERI_CTRL_ENABLE_SHIFT);
|
||||
value |= (CLK_PERI_CTRL_AUXSRC_XOSC << CLK_PERI_CTRL_AUXSRC_SHIFT);
|
||||
CLOCKS->CLK_PERI_CTRL = value;
|
||||
}
|
||||
38
drivers/0x04_pwm_cbm/Src/vector_table.c
Normal file
38
drivers/0x04_pwm_cbm/Src/vector_table.c
Normal file
@@ -0,0 +1,38 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file vector_table.c
|
||||
* @author Kevin Thomas
|
||||
* @brief Vector table with initial stack pointer and reset handler.
|
||||
*
|
||||
* Placed in the .vectors section at the start of flash.
|
||||
* The Thumb bit (bit 0 = 1) is automatically set by the
|
||||
* linker for function pointers in Thumb mode.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern uint32_t _stack_top;
|
||||
extern void Reset_Handler(void);
|
||||
|
||||
typedef void (*vector_func_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Vector table placed in .vectors section
|
||||
*/
|
||||
__attribute__((section(".vectors"), used))
|
||||
const void *_vectors[2] = {
|
||||
&_stack_top,
|
||||
Reset_Handler
|
||||
};
|
||||
114
drivers/0x04_pwm_cbm/linker.ld
Normal file
114
drivers/0x04_pwm_cbm/linker.ld
Normal file
@@ -0,0 +1,114 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file linker.ld
|
||||
* @author Kevin Thomas
|
||||
* @brief Minimal linker script for bare-metal RP2350 development.
|
||||
*
|
||||
* Defines FLASH (XIP 32 MB) and RAM (520 kB SRAM) regions.
|
||||
* The vector table is placed at the start of flash (0x10000000).
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 Kevin Thomas.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* Entry point.
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/**
|
||||
* Define memory regions.
|
||||
*/
|
||||
__XIP_BASE = 0x10000000;
|
||||
__XIP_SIZE = 32M;
|
||||
|
||||
__SRAM_BASE = 0x20000000;
|
||||
__SRAM_SIZE = 520K;
|
||||
__STACK_SIZE = 32K;
|
||||
|
||||
/**
|
||||
* Memory layout.
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
RAM (rwx) : ORIGIN = __SRAM_BASE, LENGTH = __SRAM_SIZE
|
||||
FLASH (rx) : ORIGIN = __XIP_BASE, LENGTH = __XIP_SIZE
|
||||
}
|
||||
|
||||
/**
|
||||
* Program headers.
|
||||
*/
|
||||
PHDRS
|
||||
{
|
||||
text PT_LOAD FLAGS(5);
|
||||
}
|
||||
|
||||
/**
|
||||
* Section placement.
|
||||
*/
|
||||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(FLASH);
|
||||
|
||||
/**
|
||||
* Vector table MUST be first at 0x10000000.
|
||||
*/
|
||||
.vectors :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
} > FLASH :text
|
||||
|
||||
/**
|
||||
* Verify vector table placement.
|
||||
*/
|
||||
ASSERT((ADDR(.vectors) == ORIGIN(FLASH)),
|
||||
"Vector table must be at start of flash (0x10000000)")
|
||||
|
||||
/**
|
||||
* Text and read-only data.
|
||||
*/
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
KEEP(*(.ARM.attributes))
|
||||
} > FLASH :text
|
||||
|
||||
/**
|
||||
* IMAGE_DEF block at end of code.
|
||||
*/
|
||||
.embedded_block :
|
||||
{
|
||||
KEEP(*(.embedded_block))
|
||||
} > FLASH :text
|
||||
|
||||
/**
|
||||
* Non-secure stack symbols.
|
||||
*/
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - __STACK_SIZE;
|
||||
__stack = __StackTop;
|
||||
_stack_top = __StackTop;
|
||||
|
||||
/**
|
||||
* Stack section (no load).
|
||||
*/
|
||||
.stack (NOLOAD) : { . = ALIGN(8); } > RAM
|
||||
|
||||
/**
|
||||
* Provide vector table symbol to startup code.
|
||||
*/
|
||||
PROVIDE(__Vectors = ADDR(.vectors));
|
||||
}
|
||||
438
drivers/0x04_pwm_cbm/uf2conv.py
Normal file
438
drivers/0x04_pwm_cbm/uf2conv.py
Normal file
@@ -0,0 +1,438 @@
|
||||
#!/usr/bin/env python3
|
||||
import sys
|
||||
import struct
|
||||
import subprocess
|
||||
import re
|
||||
import os
|
||||
import os.path
|
||||
import argparse
|
||||
import json
|
||||
from time import sleep
|
||||
|
||||
|
||||
UF2_MAGIC_START0 = 0x0A324655 # "UF2\n"
|
||||
UF2_MAGIC_START1 = 0x9E5D5157 # Randomly selected
|
||||
UF2_MAGIC_END = 0x0AB16F30 # Ditto
|
||||
|
||||
INFO_FILE = "/INFO_UF2.TXT"
|
||||
|
||||
appstartaddr = 0x2000
|
||||
familyid = 0x0
|
||||
|
||||
|
||||
def is_uf2(buf):
|
||||
w = struct.unpack("<II", buf[0:8])
|
||||
return w[0] == UF2_MAGIC_START0 and w[1] == UF2_MAGIC_START1
|
||||
|
||||
|
||||
def is_hex(buf):
|
||||
try:
|
||||
w = buf[0:30].decode("utf-8")
|
||||
except UnicodeDecodeError:
|
||||
return False
|
||||
if w[0] == ":" and re.match(rb"^[:0-9a-fA-F\r\n]+$", buf):
|
||||
return True
|
||||
return False
|
||||
|
||||
|
||||
def convert_from_uf2(buf):
|
||||
global appstartaddr
|
||||
global familyid
|
||||
numblocks = len(buf) // 512
|
||||
curraddr = None
|
||||
currfamilyid = None
|
||||
families_found = {}
|
||||
prev_flag = None
|
||||
all_flags_same = True
|
||||
outp = []
|
||||
for blockno in range(numblocks):
|
||||
ptr = blockno * 512
|
||||
block = buf[ptr : ptr + 512]
|
||||
hd = struct.unpack(b"<IIIIIIII", block[0:32])
|
||||
if hd[0] != UF2_MAGIC_START0 or hd[1] != UF2_MAGIC_START1:
|
||||
print("Skipping block at " + ptr + "; bad magic")
|
||||
continue
|
||||
if hd[2] & 1:
|
||||
# NO-flash flag set; skip block
|
||||
continue
|
||||
datalen = hd[4]
|
||||
if datalen > 476:
|
||||
assert False, "Invalid UF2 data size at " + ptr
|
||||
newaddr = hd[3]
|
||||
if (hd[2] & 0x2000) and (currfamilyid == None):
|
||||
currfamilyid = hd[7]
|
||||
if curraddr == None or ((hd[2] & 0x2000) and hd[7] != currfamilyid):
|
||||
currfamilyid = hd[7]
|
||||
curraddr = newaddr
|
||||
if familyid == 0x0 or familyid == hd[7]:
|
||||
appstartaddr = newaddr
|
||||
padding = newaddr - curraddr
|
||||
if padding < 0:
|
||||
assert False, "Block out of order at " + ptr
|
||||
if padding > 10 * 1024 * 1024:
|
||||
assert False, "More than 10M of padding needed at " + ptr
|
||||
if padding % 4 != 0:
|
||||
assert False, "Non-word padding size at " + ptr
|
||||
while padding > 0:
|
||||
padding -= 4
|
||||
outp.append(b"\x00\x00\x00\x00")
|
||||
if familyid == 0x0 or ((hd[2] & 0x2000) and familyid == hd[7]):
|
||||
outp.append(block[32 : 32 + datalen])
|
||||
curraddr = newaddr + datalen
|
||||
if hd[2] & 0x2000:
|
||||
if hd[7] in families_found.keys():
|
||||
if families_found[hd[7]] > newaddr:
|
||||
families_found[hd[7]] = newaddr
|
||||
else:
|
||||
families_found[hd[7]] = newaddr
|
||||
if prev_flag == None:
|
||||
prev_flag = hd[2]
|
||||
if prev_flag != hd[2]:
|
||||
all_flags_same = False
|
||||
if blockno == (numblocks - 1):
|
||||
print("--- UF2 File Header Info ---")
|
||||
families = load_families()
|
||||
for family_hex in families_found.keys():
|
||||
family_short_name = ""
|
||||
for name, value in families.items():
|
||||
if value == family_hex:
|
||||
family_short_name = name
|
||||
print(
|
||||
"Family ID is {:s}, hex value is 0x{:08x}".format(
|
||||
family_short_name, family_hex
|
||||
)
|
||||
)
|
||||
print("Target Address is 0x{:08x}".format(families_found[family_hex]))
|
||||
if all_flags_same:
|
||||
print("All block flag values consistent, 0x{:04x}".format(hd[2]))
|
||||
else:
|
||||
print("Flags were not all the same")
|
||||
print("----------------------------")
|
||||
if len(families_found) > 1 and familyid == 0x0:
|
||||
outp = []
|
||||
appstartaddr = 0x0
|
||||
return b"".join(outp)
|
||||
|
||||
|
||||
def convert_to_carray(file_content):
|
||||
outp = "const unsigned long bindata_len = %d;\n" % len(file_content)
|
||||
outp += "const unsigned char bindata[] __attribute__((aligned(16))) = {"
|
||||
for i in range(len(file_content)):
|
||||
if i % 16 == 0:
|
||||
outp += "\n"
|
||||
outp += "0x%02x, " % file_content[i]
|
||||
outp += "\n};\n"
|
||||
return bytes(outp, "utf-8")
|
||||
|
||||
|
||||
def convert_to_uf2(file_content):
|
||||
global familyid
|
||||
datapadding = b""
|
||||
while len(datapadding) < 512 - 256 - 32 - 4:
|
||||
datapadding += b"\x00\x00\x00\x00"
|
||||
numblocks = (len(file_content) + 255) // 256
|
||||
outp = []
|
||||
for blockno in range(numblocks):
|
||||
ptr = 256 * blockno
|
||||
chunk = file_content[ptr : ptr + 256]
|
||||
flags = 0x0
|
||||
if familyid:
|
||||
flags |= 0x2000
|
||||
hd = struct.pack(
|
||||
b"<IIIIIIII",
|
||||
UF2_MAGIC_START0,
|
||||
UF2_MAGIC_START1,
|
||||
flags,
|
||||
ptr + appstartaddr,
|
||||
256,
|
||||
blockno,
|
||||
numblocks,
|
||||
familyid,
|
||||
)
|
||||
while len(chunk) < 256:
|
||||
chunk += b"\x00"
|
||||
block = hd + chunk + datapadding + struct.pack(b"<I", UF2_MAGIC_END)
|
||||
assert len(block) == 512
|
||||
outp.append(block)
|
||||
return b"".join(outp)
|
||||
|
||||
|
||||
class Block:
|
||||
def __init__(self, addr, default_data=0xFF):
|
||||
self.addr = addr
|
||||
self.bytes = bytearray([default_data] * 256)
|
||||
|
||||
def encode(self, blockno, numblocks):
|
||||
global familyid
|
||||
flags = 0x0
|
||||
if familyid:
|
||||
flags |= 0x2000
|
||||
hd = struct.pack(
|
||||
"<IIIIIIII",
|
||||
UF2_MAGIC_START0,
|
||||
UF2_MAGIC_START1,
|
||||
flags,
|
||||
self.addr,
|
||||
256,
|
||||
blockno,
|
||||
numblocks,
|
||||
familyid,
|
||||
)
|
||||
hd += self.bytes[0:256]
|
||||
while len(hd) < 512 - 4:
|
||||
hd += b"\x00"
|
||||
hd += struct.pack("<I", UF2_MAGIC_END)
|
||||
return hd
|
||||
|
||||
|
||||
def convert_from_hex_to_uf2(buf):
|
||||
global appstartaddr
|
||||
appstartaddr = None
|
||||
upper = 0
|
||||
currblock = None
|
||||
blocks = []
|
||||
for line in buf.split("\n"):
|
||||
if line[0] != ":":
|
||||
continue
|
||||
i = 1
|
||||
rec = []
|
||||
while i < len(line) - 1:
|
||||
rec.append(int(line[i : i + 2], 16))
|
||||
i += 2
|
||||
tp = rec[3]
|
||||
if tp == 4:
|
||||
upper = ((rec[4] << 8) | rec[5]) << 16
|
||||
elif tp == 2:
|
||||
upper = ((rec[4] << 8) | rec[5]) << 4
|
||||
elif tp == 1:
|
||||
break
|
||||
elif tp == 0:
|
||||
addr = upper + ((rec[1] << 8) | rec[2])
|
||||
if appstartaddr == None:
|
||||
appstartaddr = addr
|
||||
i = 4
|
||||
while i < len(rec) - 1:
|
||||
if not currblock or currblock.addr & ~0xFF != addr & ~0xFF:
|
||||
currblock = Block(addr & ~0xFF)
|
||||
blocks.append(currblock)
|
||||
currblock.bytes[addr & 0xFF] = rec[i]
|
||||
addr += 1
|
||||
i += 1
|
||||
numblocks = len(blocks)
|
||||
resfile = b""
|
||||
for i in range(0, numblocks):
|
||||
resfile += blocks[i].encode(i, numblocks)
|
||||
return resfile
|
||||
|
||||
|
||||
def to_str(b):
|
||||
return b.decode("utf-8")
|
||||
|
||||
|
||||
def get_drives():
|
||||
drives = []
|
||||
if sys.platform == "win32":
|
||||
r = subprocess.check_output(
|
||||
[
|
||||
"powershell",
|
||||
"-Command",
|
||||
"(Get-WmiObject Win32_LogicalDisk -Filter \"VolumeName='RPI-RP2'\").DeviceID",
|
||||
]
|
||||
)
|
||||
drive = to_str(r).strip()
|
||||
if drive:
|
||||
drives.append(drive)
|
||||
else:
|
||||
searchpaths = ["/mnt", "/media"]
|
||||
if sys.platform == "darwin":
|
||||
searchpaths = ["/Volumes"]
|
||||
elif sys.platform == "linux":
|
||||
searchpaths += [
|
||||
"/media/" + os.environ["USER"],
|
||||
"/run/media/" + os.environ["USER"],
|
||||
]
|
||||
if "SUDO_USER" in os.environ.keys():
|
||||
searchpaths += ["/media/" + os.environ["SUDO_USER"]]
|
||||
searchpaths += ["/run/media/" + os.environ["SUDO_USER"]]
|
||||
|
||||
for rootpath in searchpaths:
|
||||
if os.path.isdir(rootpath):
|
||||
for d in os.listdir(rootpath):
|
||||
if os.path.isdir(os.path.join(rootpath, d)):
|
||||
drives.append(os.path.join(rootpath, d))
|
||||
|
||||
def has_info(d):
|
||||
try:
|
||||
return os.path.isfile(d + INFO_FILE)
|
||||
except:
|
||||
return False
|
||||
|
||||
return list(filter(has_info, drives))
|
||||
|
||||
|
||||
def board_id(path):
|
||||
with open(path + INFO_FILE, mode="r") as file:
|
||||
file_content = file.read()
|
||||
return re.search(r"Board-ID: ([^\r\n]*)", file_content).group(1)
|
||||
|
||||
|
||||
def list_drives():
|
||||
for d in get_drives():
|
||||
print(d, board_id(d))
|
||||
|
||||
|
||||
def write_file(name, buf):
|
||||
with open(name, "wb") as f:
|
||||
f.write(buf)
|
||||
print("Wrote %d bytes to %s" % (len(buf), name))
|
||||
|
||||
|
||||
def load_families():
|
||||
# The expectation is that the `uf2families.json` file is in the same
|
||||
# directory as this script. Make a path that works using `__file__`
|
||||
# which contains the full path to this script.
|
||||
filename = "uf2families.json"
|
||||
pathname = os.path.join(os.path.dirname(os.path.abspath(__file__)), filename)
|
||||
with open(pathname) as f:
|
||||
raw_families = json.load(f)
|
||||
|
||||
families = {}
|
||||
for family in raw_families:
|
||||
families[family["short_name"]] = int(family["id"], 0)
|
||||
|
||||
return families
|
||||
|
||||
|
||||
def main():
|
||||
global appstartaddr, familyid
|
||||
|
||||
def error(msg):
|
||||
print(msg, file=sys.stderr)
|
||||
sys.exit(1)
|
||||
|
||||
parser = argparse.ArgumentParser(description="Convert to UF2 or flash directly.")
|
||||
parser.add_argument(
|
||||
"input",
|
||||
metavar="INPUT",
|
||||
type=str,
|
||||
nargs="?",
|
||||
help="input file (HEX, BIN or UF2)",
|
||||
)
|
||||
parser.add_argument(
|
||||
"-b",
|
||||
"--base",
|
||||
dest="base",
|
||||
type=str,
|
||||
default="0x2000",
|
||||
help="set base address of application for BIN format (default: 0x2000)",
|
||||
)
|
||||
parser.add_argument(
|
||||
"-f",
|
||||
"--family",
|
||||
dest="family",
|
||||
type=str,
|
||||
default="0x0",
|
||||
help="specify familyID - number or name (default: 0x0)",
|
||||
)
|
||||
parser.add_argument(
|
||||
"-o",
|
||||
"--output",
|
||||
metavar="FILE",
|
||||
dest="output",
|
||||
type=str,
|
||||
help='write output to named file; defaults to "flash.uf2" or "flash.bin" where sensible',
|
||||
)
|
||||
parser.add_argument(
|
||||
"-d", "--device", dest="device_path", help="select a device path to flash"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-l", "--list", action="store_true", help="list connected devices"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-c", "--convert", action="store_true", help="do not flash, just convert"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-D", "--deploy", action="store_true", help="just flash, do not convert"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-w", "--wait", action="store_true", help="wait for device to flash"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-C",
|
||||
"--carray",
|
||||
action="store_true",
|
||||
help="convert binary file to a C array, not UF2",
|
||||
)
|
||||
parser.add_argument(
|
||||
"-i",
|
||||
"--info",
|
||||
action="store_true",
|
||||
help="display header information from UF2, do not convert",
|
||||
)
|
||||
args = parser.parse_args()
|
||||
appstartaddr = int(args.base, 0)
|
||||
|
||||
families = load_families()
|
||||
|
||||
if args.family.upper() in families:
|
||||
familyid = families[args.family.upper()]
|
||||
else:
|
||||
try:
|
||||
familyid = int(args.family, 0)
|
||||
except ValueError:
|
||||
error(
|
||||
"Family ID needs to be a number or one of: "
|
||||
+ ", ".join(families.keys())
|
||||
)
|
||||
|
||||
if args.list:
|
||||
list_drives()
|
||||
else:
|
||||
if not args.input:
|
||||
error("Need input file")
|
||||
with open(args.input, mode="rb") as f:
|
||||
inpbuf = f.read()
|
||||
from_uf2 = is_uf2(inpbuf)
|
||||
ext = "uf2"
|
||||
if args.deploy:
|
||||
outbuf = inpbuf
|
||||
elif from_uf2 and not args.info:
|
||||
outbuf = convert_from_uf2(inpbuf)
|
||||
ext = "bin"
|
||||
elif from_uf2 and args.info:
|
||||
outbuf = ""
|
||||
convert_from_uf2(inpbuf)
|
||||
elif is_hex(inpbuf):
|
||||
outbuf = convert_from_hex_to_uf2(inpbuf.decode("utf-8"))
|
||||
elif args.carray:
|
||||
outbuf = convert_to_carray(inpbuf)
|
||||
ext = "h"
|
||||
else:
|
||||
outbuf = convert_to_uf2(inpbuf)
|
||||
if not args.deploy and not args.info:
|
||||
print(
|
||||
"Converted to %s, output size: %d, start address: 0x%x"
|
||||
% (ext, len(outbuf), appstartaddr)
|
||||
)
|
||||
if args.convert or ext != "uf2":
|
||||
if args.output == None:
|
||||
args.output = "flash." + ext
|
||||
if args.output:
|
||||
write_file(args.output, outbuf)
|
||||
if ext == "uf2" and not args.convert and not args.info:
|
||||
drives = get_drives()
|
||||
if len(drives) == 0:
|
||||
if args.wait:
|
||||
print("Waiting for drive to deploy...")
|
||||
while len(drives) == 0:
|
||||
sleep(0.1)
|
||||
drives = get_drives()
|
||||
elif not args.output:
|
||||
error("No drive to deploy.")
|
||||
for d in drives:
|
||||
print("Flashing %s (%s)" % (d, board_id(d)))
|
||||
write_file(d + "/NEW.UF2", outbuf)
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
22
drivers/0x04_pwm_cbm/uf2families.json
Normal file
22
drivers/0x04_pwm_cbm/uf2families.json
Normal file
@@ -0,0 +1,22 @@
|
||||
[
|
||||
{
|
||||
"short_name": "RP2040",
|
||||
"id": "0xe48bff56",
|
||||
"description": "Raspberry Pi RP2040"
|
||||
},
|
||||
{
|
||||
"short_name": "RP2350-ARM-S",
|
||||
"id": "0xe48bff59",
|
||||
"description": "Raspberry Pi RP2350, ARM, Secure"
|
||||
},
|
||||
{
|
||||
"short_name": "RP2350-ARM-NS",
|
||||
"id": "0xe48bff5a",
|
||||
"description": "Raspberry Pi RP2350, ARM, Non-Secure"
|
||||
},
|
||||
{
|
||||
"short_name": "RP2350-RISCV",
|
||||
"id": "0xe48bff5b",
|
||||
"description": "Raspberry Pi RP2350, RISC-V"
|
||||
}
|
||||
]
|
||||
Reference in New Issue
Block a user