mirror of
https://github.com/mytechnotalent/Embedded-Hacking.git
synced 2026-07-10 06:18:40 +02:00
Kevin Thomas
3604b3c921
Rust (all 15 projects):
- Refactored overlength functions: format_counter, format_u8, format_f32_1,
format_u32_minimal, gpio_drive, read_sensor, poll_sensor, format_round_trip,
format_u32, prepare_write_buf, write_min_digits, write_temp, UartDriver::init,
init_spi, angle_to_pulse_us, compute_servo_level
- Added 200+ docstrings to test functions, mock structs, impl blocks
- Fixed pub static comments (//) to doc comments (///) in all main.rs files
- Fixed helper function ordering (helpers above callers)
- Fixed Fn(u32) -> FnMut(u32) bound in button poll_button
- Moved OneShot trait import from main.rs to board.rs in adc project
- Added unsafe {} blocks in flash unsafe fn bodies (Rust 2024 edition)
- Removed unused hal::Clock imports from pwm/servo main.rs
- All 15 projects build with zero errors and zero warnings
C Pico SDK (all 15 projects):
- Added docstrings to all public functions, macros, and static variables
- All 15 projects rebuilt with zero errors
Cleanup:
- Removed build/ and target/ directories from git tracking
- Added target/ to .gitignore
- Deleted temporary fix_rust_docs.py script
116 lines
3.9 KiB
C
116 lines
3.9 KiB
C
/**
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* @file spi.c
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* @brief Implementation of SPI bus driver (master mode)
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* @author Kevin Thomas
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* @date 2025
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*
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* MIT License
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*
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* Copyright (c) 2025 Kevin Thomas
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "spi.h"
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#include "pico/stdlib.h"
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#include "hardware/spi.h"
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/**
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* @brief Map an SPI port number to its hardware instance pointer
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*
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* @param port SPI port number (0 for spi0, 1 for spi1)
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* @return spi_inst_t* Pointer to the corresponding SPI hardware instance
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*/
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static spi_inst_t *_get_spi_inst(uint8_t port) {
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return port == 0 ? spi0 : spi1;
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}
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/**
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* @brief Assign GPIO alternate functions for the SPI data and clock pins
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*
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* @param mosi GPIO pin for MOSI
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* @param miso GPIO pin for MISO
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* @param sck GPIO pin for SCK
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*/
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static void _setup_spi_pins(uint32_t mosi, uint32_t miso, uint32_t sck) {
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gpio_set_function(mosi, GPIO_FUNC_SPI);
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gpio_set_function(miso, GPIO_FUNC_SPI);
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gpio_set_function(sck, GPIO_FUNC_SPI);
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}
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/**
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* @brief Initialize an SPI peripheral in master mode
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*
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* Configures the SPI instance at the requested baud rate, assigns GPIO
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* alternate functions for MOSI, MISO, and SCK, and configures the chip
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* select pin as a GPIO output deasserted (high) by default.
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*
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* @param port SPI port number (0 for spi0, 1 for spi1)
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* @param mosi GPIO pin number for MOSI (controller TX)
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* @param miso GPIO pin number for MISO (controller RX)
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* @param sck GPIO pin number for SCK (clock)
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* @param cs GPIO pin number for chip select (active-low)
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* @param baud_hz Desired SPI clock frequency in Hz (e.g. 1000000 for 1 MHz)
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*/
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void spi_driver_init(uint8_t port, uint32_t mosi, uint32_t miso,
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uint32_t sck, uint32_t cs, uint32_t baud_hz) {
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spi_inst_t *spi = _get_spi_inst(port);
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spi_init(spi, baud_hz);
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_setup_spi_pins(mosi, miso, sck);
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gpio_init(cs);
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gpio_set_dir(cs, GPIO_OUT);
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gpio_put(cs, 1);
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}
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/**
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* @brief Assert the chip-select line (drive CS low)
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*
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* @param cs GPIO pin number of the chip-select output
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*/
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void spi_driver_cs_select(uint32_t cs) {
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gpio_put(cs, 0);
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}
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/**
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* @brief Deassert the chip-select line (drive CS high)
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*
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* @param cs GPIO pin number of the chip-select output
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*/
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void spi_driver_cs_deselect(uint32_t cs) {
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gpio_put(cs, 1);
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}
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/**
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* @brief Perform a full-duplex SPI transfer
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*
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* Sends len bytes from tx while simultaneously receiving len bytes
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* into rx. Both buffers must hold at least len bytes. The caller is
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* responsible for asserting and deasserting CS around this call.
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*
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* @param port SPI port number (0 for spi0, 1 for spi1)
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* @param tx Pointer to the transmit buffer (must be len bytes)
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* @param rx Pointer to the receive buffer (must be len bytes)
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* @param len Number of bytes to transfer
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*/
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void spi_driver_transfer(uint8_t port, const uint8_t *tx, uint8_t *rx,
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uint32_t len) {
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spi_inst_t *spi = _get_spi_inst(port);
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spi_write_read_blocking(spi, tx, rx, (size_t)len);
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}
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