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187 lines
6.5 KiB
Markdown
187 lines
6.5 KiB
Markdown
# Week 3 Quiz: RP2350 Architecture and Boot Sequence
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## Instructions
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Choose the best answer for each question. There is only one correct answer per question.
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---
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## Questions
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### Question 1
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What is the bootrom on the RP2350, and what is its primary purpose?
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A) A 512 KB area of RAM used to cache frequently executed code
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B) A 32 KB piece of code permanently burned into the chip that finds and loads your firmware
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C) A configuration region in flash that stores Wi-Fi credentials
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D) A special debug interface that only activates during BOOTSEL mode
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> 📖 **Reference:** Week 3, Part 2 – "What is the Bootrom?" and "Key Bootrom Facts"
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**Correct Answer: B**
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---
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### Question 2
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What value is stored at offset `0x00` in the vector table (address `0x10000000`)?
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A) The address of the `main()` function
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B) The address of the NMI handler
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C) The initial Stack Pointer value
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D) The IMAGE_DEF magic start marker
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> 📖 **Reference:** Week 3, Part 4 – "Vector Table Layout" (table)
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**Correct Answer: C**
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---
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### Question 3
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The reset handler address in the vector table is `0x1000015d` - an odd number. Why?
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A) The address was misaligned during linking and the SDK automatically corrects it
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B) The least significant bit (LSB) set to 1 signals to the processor that the code is in Thumb mode
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C) Odd addresses are reserved for interrupt handlers by the ARM specification
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D) The bootrom adds 1 to all addresses before storing them in the vector table
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> 📖 **Reference:** Week 3, Part 4 – "Understanding Thumb Mode Addressing"
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**Correct Answer: B**
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---
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### Question 4
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What does the BSS section contain, and what value are its contents set to at startup?
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A) Initialized global variables; copied from their flash values
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B) Constant strings and read-only data; they remain unchanged
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C) Uninitialized global/static variables; they are zeroed to 0
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D) Stack frames for active functions; they are filled with 0xDEADBEEF
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> 📖 **Reference:** Week 3, Part 11 – "What is BSS?"
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**Correct Answer: C**
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---
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### Question 5
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What CPUID register value indicates that the code is executing on Core 0 of the RP2350?
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A) `0x1`
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B) `0xd0000000`
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C) `0x2`
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D) `0x0`
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> 📖 **Reference:** Week 3, Part 8, Step 5 – "Understanding the Reset Handler" (CPUID core value table)
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**Correct Answer: D**
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---
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### Question 6
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Which ARM assembly instruction does the reset handler use to conditionally skip Core 1's hold loop and continue with Core 0 startup?
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A) `b.n` (branch always)
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B) `cbz r0, <address>` (compare and branch if zero)
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C) `blx r1` (branch with link and exchange)
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D) `ldr r0, [r0, #0]` (load register)
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> 📖 **Reference:** Week 3, Part 8, Step 4 – "Disassemble the Reset Handler" and Step 5 – "Understanding the Reset Handler"
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**Correct Answer: B**
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---
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### Question 7
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What happens to initialized global variables (e.g., `int counter = 42;`) during the startup phase before `main()` runs?
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A) They are kept in flash and accessed directly from there via XIP
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B) They are discarded and replaced with zero-initialized values
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C) Their initial values are copied from flash to RAM by the reset handler's data copy phase
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D) They are stored in the vector table for fast access
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> 📖 **Reference:** Week 3, Part 10 – "What is the Data Copy Phase?"
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**Correct Answer: C**
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---
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### Question 8
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What is the purpose of the IMAGE_DEF structure found at the start of a Pico 2 firmware binary?
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A) It stores the compiled size of each function for Ghidra analysis
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B) It is a marker that tells the bootrom there is valid firmware present at that location
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C) It maps GPIO pin numbers to their hardware register addresses
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D) It defines the initial values of all global variables
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> 📖 **Reference:** Week 3, Part 2 – "The IMAGE_DEF Structure"
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**Correct Answer: B**
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---
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### Question 9
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Based on the linker script, how is the initial stack pointer value of `0x20082000` calculated?
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A) It is a fixed constant hard-coded into the bootrom
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B) It is the start of SRAM (`0x20000000`) plus the total binary size
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C) It is the `SCRATCH_Y` region origin (`0x20081000`) plus its length (`0x1000`)
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D) It is the end of flash memory rounded up to the nearest 4 KB boundary
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> 📖 **Reference:** Week 3, Part 5 – "Where Does the Stack Come From?"
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**Correct Answer: C**
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---
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### Question 10
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What does a `bkpt` instruction do when executed by the RP2350 processor, and where is it used in the startup code?
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A) It skips the next instruction; used to handle Thumb-mode alignment padding
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B) It triggers a breakpoint halt; used in the default exception handlers for faults like HardFault
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C) It broadcasts a reset signal to Core 1; used at the end of the BSS clear phase
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D) It reads a byte from memory; used by the data copy phase to transfer initialized data
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> 📖 **Reference:** Week 3, Part 12, Step 11 – "Look at the Default Exception Handlers"
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**Correct Answer: B**
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---
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## Answer Key
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1. B - The bootrom is 32 KB of permanent on-chip ROM that finds and loads firmware
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2. C - Offset 0x00 in the vector table holds the initial Stack Pointer value (0x20082000)
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3. B - The LSB=1 in an ARM vector table address indicates Thumb mode code
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4. C - BSS contains uninitialized global/static variables, all zeroed to 0 at startup
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5. D - Core 0 has CPUID value 0; Core 1 has CPUID value 1
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6. B - `cbz r0, <address>` branches if r0 is zero (Core 0), continuing normal startup
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7. C - The reset handler's data copy phase copies initial values from flash to RAM
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8. B - IMAGE_DEF contains magic markers that the bootrom checks to validate firmware
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9. C - StackTop = SCRATCH_Y origin (0x20081000) + SCRATCH_Y length (0x1000) = 0x20082000
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10. B - `bkpt` halts execution for the debugger; it is used as the default fault/exception handler
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---
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## Scoring Guide
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- **10 correct**: Excellent! You have a strong grasp of Week 3 concepts
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- **8-9 correct**: Very good! Review the topics you missed
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- **6-7 correct**: Good start. Go back and review the key concepts
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- **5 or fewer**: Review the Week 3 material again and try the practice exercises
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---
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## Topics Covered
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This quiz tests your understanding of:
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- The bootrom: what it is and what it does
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- The vector table structure and its entries
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- Thumb mode addressing and the LSB convention
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- BSS section and zero initialization
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- Multi-core startup: Core 0 vs Core 1 detection
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- The `cbz` instruction and conditional branching
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- Data copy phase: initialized variables from flash to RAM
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- The IMAGE_DEF firmware validation marker
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- Linker script memory regions and stack pointer calculation
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- Default exception handlers and the `bkpt` instruction
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